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@PROCEEDINGS{Lohoff:1016966,
author = {Lohoff, Jamie and Yu, Zhenming and Finkbeiner, Jan Robert
and Kaya, Anil and Stewart, Kenneth and Wai Lui, Hin and
Neftci, Emre},
title = {{I}nterfacing {N}euromorphic {H}ardware with {M}achine
{L}earning {F}rameworks - {A} {R}eview},
publisher = {ACM New York, NY, USA},
reportid = {FZJ-2023-03873},
year = {2023},
abstract = {With the emergence of neuromorphic hardware as a promising
low-power parallel computing platform, the need for tools
that allowresearchers and engineers to efficiently interact
with such hardwareis rapidly growing. Machine learning
frameworks like Tensorflow,PyTorch and JAX have been
instrumental for the success of machinelearning in recent
years as they enable seamless interaction withtraditional
machine learning accelerators such as GPUs and TPUs.In stark
contrast, interfacing with neuromorphic hardware
remainsdifficult since the aforementioned frameworks do not
address thechallenges associated with mapping neural network
models and al-gorithms to physical hardware. In this paper,
we review the variousstrategies employed throughout the
neuromorphic computing com-munity to tackle these challenges
and categorize them according totheir methodologies and
implementation effort. This classificationserves as a
guideline for device engineers and software developersalike
to enable them to choose the best-fit solution in regard of
theirdemands and available resources. Finally, we provide a
JAX-basedproof-of-concept implementation of a compilation
pipeline tailoredto the needs of researchers in the early
stages of device develop-ment, where parts of the
computational graph can be mapped ontocustom hardware via
operations exposed through a C++ or Pythoninterface. The
code is available at https://github.com/PGI15/xbarax.},
month = {Aug},
date = {2023-08-03},
organization = {International Conference on
Neuromorphic Systems, Santa Fe (USA), 3
Aug 2023 - 5 Aug 2023},
cin = {PGI-15},
cid = {I:(DE-Juel1)PGI-15-20210701},
pnm = {5234 - Emerging NC Architectures (POF4-523) / BMBF
16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien
der künstlichen Intelligenz für die Elektronik der Zukunft
- NEUROTEC II - (BMBF-16ME0398K) / BMBF 16ME0399 -
Verbundprojekt: Neuro-inspirierte Technologien der
künstlichen Intelligenz für die Elektronik der Zukunft -
NEUROTEC II - (BMBF-16ME0399)},
pid = {G:(DE-HGF)POF4-5234 / G:(DE-82)BMBF-16ME0398K /
G:(DE-82)BMBF-16ME0399},
typ = {PUB:(DE-HGF)26},
doi = {10.1145/3589737.3605967},
url = {https://juser.fz-juelich.de/record/1016966},
}