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| Hauptseite > Publikationsdatenbank > On Automating FPGA Design Build Flow Using GitLab CI > print |
| 001 | 1017495 | ||
| 005 | 20250204113736.0 | ||
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| 037 | _ | _ | |a FZJ-2023-04155 |
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| 100 | 1 | _ | |a Eguzo, Chimezie |0 P:(DE-Juel1)180232 |b 0 |e Corresponding author |
| 245 | _ | _ | |a On Automating FPGA Design Build Flow Using GitLab CI |
| 260 | _ | _ | |a New York, NY |c 2024 |b Inst. of Electrical and Electronics Engineers |
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| 520 | _ | _ | |a Building and testing software for embedded systems can be challenging with an impact on delivery time, design reproducibility, and collaboration among project contributors. To accelerate project development, presented here is an automated build flow that utilizes Xilinx PetaLinux, and Field Programmable Gate Array (FPGA) hardware description and integrates with the GitLab Continuous Integration and Continuous Deployment (CI/CD) framework for embedded targets. This build flow automates the complete process of FPGA implementation, PetaLinux configuration, and cross-compilation of software essentials for the target system-on-chip (SoC). The system has been successfully deployed in cross-compiling the control and command toolset for the Positron Emission Tomography scanner (PhenoPET) and the implementation of the Message Queuing Telemetry Transport (MQTT) service on a Xilinx Zynq Ultrascale MPSoC. This approach can be easily adapted to other projects with specific requirements. |
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