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@PHDTHESIS{Otten:1018302,
      author       = {Otten, René},
      title        = {{S}pin qubit control and readout using cryogenic
                      electronics},
      school       = {RWTH Aachen},
      type         = {Dissertation},
      publisher    = {RWTH Aachen University},
      reportid     = {FZJ-2023-04687},
      pages        = {pages 1 Online-Ressource : Illustrationen, Diagramme},
      year         = {2023},
      note         = {Dissertation, RWTH Aachen, 2023},
      abstract     = {Recent progress in the field of quantum computation has
                      further substantiated the claim of a computational advantage
                      for quantum computers and recent developments in multiple
                      platforms such as superconducting qubits, ion traps, optical
                      systems, and neutral atoms create hope that large scale
                      quantum computers are within reach. In the meantime, spin
                      qubits in semiconductors have achieved error rates for all
                      aspects of their operation beyond the error correction
                      threshold, and now face the challenge of scaling to larger
                      system sizes, while maintaining their 'semiconductor'
                      scaling advantage. In this spirit multiple ideas for
                      architectures have emerged that integrate the quantum layer
                      with local control electronics creating a QPU with high
                      interconnect density between qubits and control while
                      maintaining a sparse amount of connection in and out of the
                      cryostat. In this thesis, I demonstrate multiple steps
                      towards this vision: dc-bias voltage generation and readout
                      amplification. I show that the operation of traditional CMOS
                      electronics at mK temperatures on the mixing chamber is
                      feasible and use a custom ultra-low power DAC to bias
                      electrodes of a GaAs qubit chip. We achieve an
                      integrated-circuit power consumption of 30 µW, of which 13
                      µW can be attributed to the DAC, while generating 8 output
                      voltages with a refresh rate of 4 kHz. We observe no leakage
                      while storing the voltage on sample-and-hold capacitors on
                      this timescale. Voltage drift due to leakage is quantified
                      to be 125 µV/s, well below room temperature values and
                      likely limited by the Schottky contacts on the qubit chip.
                      Nevertheless, this highlights that custom IC designs for
                      ultra-low temperatures are a valuable tool for achieving
                      ultra-low power, scalable control electronics. We manage to
                      maintain qubit and IC temperatures below 1 K with thermal
                      gradients at material interfaces presenting the main
                      obstacle for reaching lower temperatures. This allows us to
                      measure a single electron transistor only with bias voltages
                      generated by our CryoDAC. Extrapolating from our results, we
                      demonstrate that bias voltage generation with a power
                      consumption of ~4 nW/ch is feasible paving the way for
                      integrated generation on up to 107 voltages within the
                      cooling power budget available in a cryostat optimized for
                      integrated control electronics. As a second step towards
                      integrating readout and control, we investigate
                      heterojunction-bipolar transistors as cryogenic amplifiers
                      in direct proximity to a qubit chip. By biasing the
                      transistor away from its nominal operating point near the
                      saturation regime, we maintain gain and transconduction, 200
                      and gm = 0.1 mS @ Ib = 2 nA, away from the forward-active
                      regime, while lowering the power consumption significantly
                      by a factor of 8. I investigate biasing options for these
                      transistors and investigate their noise performance, showing
                      1/f noise all the way to the noise floor of our measurement
                      setup. I demonstrate functional amplifier behavior at power
                      consumption as low as 50 nW, paving the way for integrated,
                      close-to-qubit readout readout amplification for large qubit
                      numbers. To underline the usefulness for qubit operation, I
                      also show charge detection and fast recording of charge
                      stability diagrams using a charge sensor amplified by the
                      HBT. To complement these advancements, I summarize automated
                      tuning methods we developed across multiple experiments,
                      cryostats and cooldowns. I show that we are able to reliably
                      tune devices to the single electron regime automatically
                      with relatively simple methods across different readout
                      amplification techniques. We use the data gathered in these
                      experiments to train a convolutional neural network to
                      automatically classify charge stability diagrams by the
                      number of observed quantum dots with an accuracy of $94\%,$
                      enabling more sophisticated automated tuning algorithms in
                      the future. I complement the previous results by summarizing
                      the state-of-the-art in flip-chip bonding and 3D integration
                      technologies and putting the locally available processes
                      into this context. Overall, my thesis provides advances,
                      outlines ways forward, and provides guidance on many
                      complementing aspects of scaling quantum computing systems
                      to the qubit numbers needed for fully error-corrected
                      systems. This includes signal generation and control,
                      readout, and cryogenic amplification, automated-tuning and
                      calibration, as well as heterogeneous integration and
                      cryostat design. By doing so I substantiate the dream of a
                      useful quantum computing system in the (not so distant)
                      future.},
      keywords     = {Hochschulschrift (Other) / physics ; quantum computing ;
                      quantum information ; quantum mechanics ; qubits ;
                      semiconductors ; solid state physics ; spin qubits ;
                      cryoelectronics ; heterojunction-bipolar transistors ; qubit
                      control ; qubit readout ; automated tuning ; machine
                      learning (Other)},
      cin          = {PGI-11},
      cid          = {I:(DE-Juel1)PGI-11-20170113},
      pnm          = {5221 - Advanced Solid-State Qubits and Qubit Systems
                      (POF4-522)},
      pid          = {G:(DE-HGF)POF4-5221},
      typ          = {PUB:(DE-HGF)11},
      doi          = {10.18154/RWTH-2023-07133},
      url          = {https://juser.fz-juelich.de/record/1018302},
}