%0 Conference Paper
%A Schreckenberg, Lea
%A Otten, René
%A Vliex, Patrick
%A Xue, Ran
%A Tu, Jhih-Sian
%A Seidler, Inga
%A Trellenkamp, Stefan
%A Schreiber, Lars
%A Bluhm, Hendrik
%A van Waasen, Stefan
%T SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK Temperature
%I IEEE
%M FZJ-2023-04689
%P 161-164
%D 2023
%X For running advanced algorithms on a universal quantum computer, millions of qubits are required. To make use of quantum effects, state-of-the-art solid-state qubit devices have to be cooled to mK temperatures, which limits the systems’ scalability with room temperature (RT) electronics. We present the direct co-integration of a scalable, fully integrated, eight channel Bias-DAC designed in a 65-nm bulk CMOS technology and a Si/SiGe spin qubit device at the mixing chamber (MC) of a dilution refrigerator operating below 45 mK MC temperature. As a full proof of principle, the bias of a single electron transistor used as a sensing dot, as well as a single and double quantum dot bias of the qubit device is reported. The slow drift of the DAC S&H output circuit of 0.96 μV/s leads to a calculated prospective power consumption of 64.5 pW/ch for DC qubit bias voltages generated at low temperature.
%B ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
%C 11 Sep 2023 - 14 Sep 2023, Lisbon (Portugal)
Y2 11 Sep 2023 - 14 Sep 2023
M2 Lisbon, Portugal
%F PUB:(DE-HGF)8
%9 Contribution to a conference proceedings
%U <Go to ISI:>//WOS:001088613100041
%R 10.1109/ESSCIRC59616.2023.10268801
%U https://juser.fz-juelich.de/record/1018304