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| 001 | 1019426 | ||
| 005 | 20240116084328.0 | ||
| 024 | 7 | _ | |a 10.1007/S11227-023-05335-8 |2 doi |
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| 100 | 1 | _ | |a Mazumbar, Somnath |0 P:(DE-HGF)0 |b 0 |e Corresponding author |
| 245 | _ | _ | |a NoC-based hardware software co-design framework for dataflow thread management |
| 260 | _ | _ | |c 2023 |b Springer Science + Business Media B.V |
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| 520 | _ | _ | |a Applications running in a large and complex manycore system can significantly benefit from adopting the dataflow model of computation. In a dataflow execution environment, a thread can run only if all its required inputs are available. While the potential benefits are large, it is not trivial to improve resource utilization and energy efficiency by focusing on dataflow thread execution models (i.e., the ways specifying how the threads adhering to a dataflow model of computation execute on a given compute/communication architecture). This paper proposes and implements a hardware-software co-design-based dataflow threads management framework. It works at the Network-on-Chip (NoC) level and consists of three stages. The first stage focuses on a fast and effective thread distribution policy. The next stage proposes an approach that adds reconfigurability to a 2D mesh NoC via customized instructions to manage the dataflow thread distribution. Finally, a 2D mesh and ring-based hybrid NoC is proposed for better scalability and higher performance. This work can be considered a primary reference framework from which extensions can be carried out. |
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| 773 | _ | _ | |a 10.1007/S11227-023-05335-8 |0 PERI:(DE-600)1479917-0 |p 17983-18020 |t The journal of supercomputing |v 79 |y 2023 |x 0920-8542 |
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