001     1021914
005     20240226075413.0
024 7 _ |a 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134252
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024 7 _ |a WOS:001012107600068
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037 _ _ |a FZJ-2024-01062
100 1 _ |a Junk, Yannik
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111 2 _ |a 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT)
|c Hsinchu
|d 2023-04-17 - 2023-04-20
|w Taiwan
245 _ _ |a Vertical GeSn/SiGeSn GAA Nanowire n-FETs with High Electron Mobility
260 _ _ |c 2023
|b IEEE
300 _ _ |a 1-2
336 7 _ |a CONFERENCE_PAPER
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520 _ _ |a Vertical gate-all-around (GAA) nanowire (NW) FETs based on Si compatible group IV GeSn alloys are presented. The NW devices with diameter of 25 nm show an almost ideal subthreshold swing (SS) of 65 mV/dec at 300 K. The increased Sn content in the GeSn channel offers a larger population of electrons in the Γ -valley that exhibit a lower effective mass and larger mobility. This is confirmed by comparison of two fabricated devices with 10% and 8% Sn content channels, where the GeSn channel n-FETs with 10% Sn content shows larger ION and higher transconductance than the one with 8% Sn content. At low temperatures, the devices show a low SS of 9 mV/dec as well as a very sharp transition from subthreshold to on-state, revealing a high potential for cryo-CMOS applications.
536 _ _ |a 5234 - Emerging NC Architectures (POF4-523)
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536 _ _ |a Verbundprojekt: Erforschung nanoelektronischer Höchstleistungs-Bauelemente für innovative Elektronik auf Basis neuer Materialsysteme - ForMikro-SiGeSn-NanoFETs - , Teilvorhaben: CVD-basierte Herstellung von SiGeSn-Halbleiterheterostrukturen und vertikalen (16ES1074)
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700 1 _ |a Frauenrath, Marvin
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700 1 _ |a Han, Yi
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700 1 _ |a Sun, Jingxuan
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700 1 _ |a Diaz, Omar Concepción
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700 1 _ |a Bae, Jin-Hee
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700 1 _ |a Hartmann, Jean-Michel
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700 1 _ |a Grützmacher, Detlev
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700 1 _ |a Buca, Dan
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700 1 _ |a Zhao, Qing-Tai
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773 _ _ |a 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134252
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