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@ARTICLE{Concepcin:1026692,
author = {Concepción, Omar and Tiscareño-Ramírez, Jhonny and
Chimienti, Ada Angela and Classen, Thomas and Corley-Wiciak,
Agnieszka Anna and Tomadin, Andrea and Spirito, Davide and
Pisignano, Dario and Graziosi, Patrizio and Ikonic, Zoran
and Zhao, Qing Tai and Grützmacher, Detlev and Capellini,
Giovanni and Roddaro, Stefano and Virgilio, Michele and
Buca, Dan},
title = {{R}oom {T}emperature {L}attice {T}hermal {C}onductivity of
{G}e{S}n {A}lloys},
journal = {ACS applied energy materials},
volume = {7},
number = {10},
issn = {2574-0962},
address = {Washington, DC},
publisher = {ACS Publications},
reportid = {FZJ-2024-03506},
pages = {4394 - 4401},
year = {2024},
abstract = {CMOS-compatible materials for efficient energy harvesters
at temperatures characteristic for on-chip operation and
body temperature are the key ingredients for sustainable
green computing and ultralow power Internet of Things
applications. In this context, the lattice thermal
conductivity (κ) of new group IV semiconductors, namely
Ge1–xSnx alloys, are investigated. Layers featuring Sn
contents up to 14 $at.\%$ are epitaxially grown by
state-of-the-art chemical-vapor deposition on Ge buffered Si
wafers. An abrupt decrease of the lattice thermal
conductivity (κ) from 55 W/(m·K) for Ge to 4 W/(m·K) for
Ge0.88Sn0.12 alloys is measured electrically by the
differential 3ω-method. The thermal conductivity was
verified to be independent of the layer thickness for
strained relaxed alloys and confirms the Sn dependence
observed by optical methods previously. The experimental κ
values in conjunction with numerical estimations of the
charge transport properties, able to capture the complex
physics of this quasi-direct bandgap material system, are
used to evaluate the thermoelectric figure of merit ZT for
n- and p-type GeSn epitaxial layers. The results highlight
the high potential of single-crystal GeSn alloys to achieve
similar energy harvest capability as already present in SiGe
alloys but in the 20 °C–100 °C temperature range where
Si-compatible semiconductors are not available. This opens
the possibility of monolithically integrated thermoelectric
on the CMOS platform.},
cin = {PGI-9},
ddc = {540},
cid = {I:(DE-Juel1)PGI-9-20110106},
pnm = {5234 - Emerging NC Architectures (POF4-523)},
pid = {G:(DE-HGF)POF4-5234},
typ = {PUB:(DE-HGF)16},
pubmed = {38817849},
UT = {WOS:001226106500001},
doi = {10.1021/acsaem.4c00275},
url = {https://juser.fz-juelich.de/record/1026692},
}