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@INPROCEEDINGS{Yu:1028664,
author = {Yu, Jiaao and Manea, Paul and Ameli Kalkhouran, Sara and
Hizzani, Mohammad and Eldebiky, Amro and Strachan, John
Paul},
title = {{A}nalog {F}eedback-{C}ontrolled {M}emristor {P}rogramming
{C}ircuit for {A}nalog {C}ontent {A}ddressable {M}emory},
volume = {6},
publisher = {IEEE},
reportid = {FZJ-2024-04731},
pages = {983-988},
year = {2023},
abstract = {Recent breakthroughs in associative memories suggest that
silicon memories are coming closer to human memories,
especially for memristive Content Addressable Memories
(CAMs) which are capable to read and write in analog values.
However, the Program-Verify algorithm, the state-of-the-art
memristor programming algorithm, requires frequent switching
between verifying and programming memristor conductance,
which brings many defects such as high dynamic power and
long programming time. Here, we propose an analog
feedback-controlled memristor programming circuit that makes
use of a novel look-up table-based (LUT-based) programming
algorithm. With the proposed algorithm, the programming and
the verification of a memristor can be performed in a
single-direction sequential process. Besides, we also
integrated a single proposed programming circuit with eight
analog CAM (aCAM) cells to build an aCAM array. We present
SPICE simulations on TSMC 28nm process. The theoretical
analysis shows that 1. A memristor conductance within an
aCAM cell can be converted to an output boundary voltage in
aCAM searching operations and 2. An output boundary voltage
in aCAM searching operations can be converted to a
programming data line voltage in aCAM programming
operations. The simulation results of the proposed
programming circuit prove the theoretical analysis and thus
verify the feasibility to program memristors without
frequently switching between verifying and programming the
conductance. Besides, the simulation results of the proposed
aCAM array show that the proposed programming circuit can be
integrated into a large array architecture.},
month = {Oct},
date = {2023-10-25},
organization = {2023 IEEE International Conference on
Metrology for eXtended Reality,
Artificial Intelligence and Neural
Engineering (MetroXRAINE), Milano
(Italy), 25 Oct 2023 - 27 Oct 2023},
cin = {PGI-14},
cid = {I:(DE-Juel1)PGI-14-20210412},
pnm = {5234 - Emerging NC Architectures (POF4-523) / 5233 -
Memristive Materials and Devices (POF4-523)},
pid = {G:(DE-HGF)POF4-5234 / G:(DE-HGF)POF4-5233},
typ = {PUB:(DE-HGF)8},
doi = {10.1109/MetroXRAINE58569.2023.10405732},
url = {https://juser.fz-juelich.de/record/1028664},
}