001031258 001__ 1031258
001031258 005__ 20250129092503.0
001031258 037__ $$aFZJ-2024-05636
001031258 041__ $$aEnglish
001031258 1001_ $$0P:(DE-Juel1)201575$$aShamookh, Muhammad$$b0
001031258 1112_ $$aInternational Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Application to Circuit Design$$cVolos$$d2024-07-02 - 2024-07-05$$gSMACD 2024$$wGreece
001031258 245__ $$a3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2 based Memristors
001031258 260__ $$c2024
001031258 3367_ $$033$$2EndNote$$aConference Paper
001031258 3367_ $$2DataCite$$aOther
001031258 3367_ $$2BibTeX$$aINPROCEEDINGS
001031258 3367_ $$2DRIVER$$aconferenceObject
001031258 3367_ $$2ORCID$$aLECTURE_SPEECH
001031258 3367_ $$0PUB:(DE-HGF)6$$2PUB:(DE-HGF)$$aConference Presentation$$bconf$$mconf$$s1733819084_14572$$xAfter Call
001031258 520__ $$aA high voltage (HV) that is usually not available in modern nodes is required to form memristors. A scalable implementation requires the HV to be generated on chip and this work proposes such a generator. In a 28nm CMOS process, a three-stage charge pump (CP) is designed in the absence of HV-transistors. For the HfO2 based memristor electroforming (EF), a developed CP runs with an efficiency of 46.5% at an output voltage of 3.35V and a load current of 184.9μA from a 1.8V supply. The optimum design strategy for a cross-coupled charge pump (CC-CP) is explained for a low ripple < 6mV, while at the same time ensuring lower capacitor value and high reliability. The results of an over-voltage analytical investigation have important ramifications for lowering the overall area without compromising output voltage or CP efficiency. Monte Carlo simulation for 200 samples were also performed to verify the design’s robustness. However, the proposed design can be readily extended to any memristor application or material, thereby paving the way for the integration of fully integrated chips (ICs) for memristor EF in smaller technology nodes.
001031258 536__ $$0G:(DE-HGF)POF4-5234$$a5234 - Emerging NC Architectures (POF4-523)$$cPOF4-523$$fPOF IV$$x0
001031258 536__ $$0G:(DE-82)BMBF-16ME0398K$$aBMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K)$$cBMBF-16ME0398K$$x1
001031258 65017 $$0V:(DE-MLZ)GC-1601-2016$$2V:(DE-HGF)$$aEngineering, Industrial Materials and Processing$$x0
001031258 7001_ $$0P:(DE-Juel1)176328$$aAshok, Arun$$b1
001031258 7001_ $$0P:(DE-Juel1)145837$$aZambanini, Andre$$b2
001031258 7001_ $$0P:(DE-HGF)0$$aGeläschus, Anton Ulrich$$b3
001031258 7001_ $$0P:(DE-Juel1)159350$$aGrewing, Christian$$b4
001031258 7001_ $$0P:(DE-HGF)0$$aBahr, Andreas$$b5
001031258 7001_ $$0P:(DE-Juel1)142562$$avan Waasen, Stefan$$b6
001031258 909CO $$ooai:juser.fz-juelich.de:1031258$$pVDB
001031258 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)201575$$aForschungszentrum Jülich$$b0$$kFZJ
001031258 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)176328$$aForschungszentrum Jülich$$b1$$kFZJ
001031258 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)145837$$aForschungszentrum Jülich$$b2$$kFZJ
001031258 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)159350$$aForschungszentrum Jülich$$b4$$kFZJ
001031258 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)142562$$aForschungszentrum Jülich$$b6$$kFZJ
001031258 9131_ $$0G:(DE-HGF)POF4-523$$1G:(DE-HGF)POF4-520$$2G:(DE-HGF)POF4-500$$3G:(DE-HGF)POF4$$4G:(DE-HGF)POF$$9G:(DE-HGF)POF4-5234$$aDE-HGF$$bKey Technologies$$lNatural, Artificial and Cognitive Information Processing$$vNeuromorphic Computing and Network Dynamics$$x0
001031258 9141_ $$y2024
001031258 920__ $$lyes
001031258 9201_ $$0I:(DE-Juel1)ZEA-2-20090406$$kZEA-2$$lZentralinstitut für Elektronik$$x0
001031258 980__ $$aconf
001031258 980__ $$aVDB
001031258 980__ $$aI:(DE-Juel1)ZEA-2-20090406
001031258 980__ $$aUNRESTRICTED
001031258 981__ $$aI:(DE-Juel1)PGI-4-20110106