TY  - CONF
AU  - Mair, Jonas
AU  - Kusuma, Sabitha
AU  - Liebau, Daniel
AU  - Duipmans, Lammert
AU  - Schreckenberg, Lea
AU  - Vliex, Patrick
AU  - Zambanini, André
AU  - Waasen, Stefan van
TI  - Rapid Prototyping Platform for Integrated Circuits for Quantum Computing
PB  - IEEE
M1  - FZJ-2024-06200
SP  - 1-4
PY  - 2024
AB  - This paper describes a digital framework that enables rapid prototyping of mixed-signal CMOS circuits to be operated at cryogenic temperatures down to a few Kelvin. The resulting shorter iteration cycles allow us to verify circuit performance more frequently, which is crucial due to the lack of adequate CMOS models at cryogenic temperatures. The framework combines a JTAG programming and a chip-to-chip communication interface as well as a RISC-V processor with 64 kB of SRAM memory. Internally, mixed-signal circuits under test can be connected using predefined interfaces, allowing for flexible configuration at runtime. We used this concept to submit two designs in a 22 nm fully depleted silicon-on-insulator (FDSOI) technology for the integration with quantum bits (qubits): a cryogenic digital-to-analog converter as well as a readout circuit optimized for electron-spin qubits. Digital performance is verified using measurements at room temperature as well as at cryogenic temperatures.
T2  - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
CY  - 2 Jul 2024 - 5 Jul 2024, Volos (Greece)
Y2  - 2 Jul 2024 - 5 Jul 2024
M2  - Volos, Greece
LB  - PUB:(DE-HGF)8
UR  - <Go to ISI:>//WOS:001453403300015
DO  - DOI:10.1109/SMACD61181.2024.10745395
UR  - https://juser.fz-juelich.de/record/1032383
ER  -