001032434 001__ 1032434
001032434 005__ 20250610131452.0
001032434 0247_ $$2doi$$a10.1109/SMACD61181.2024.10745430
001032434 0247_ $$2WOS$$aWOS:001453403300039
001032434 037__ $$aFZJ-2024-06240
001032434 041__ $$aEnglish
001032434 1001_ $$0P:(DE-Juel1)201575$$aShamookh, Muhammad$$b0$$eCorresponding author
001032434 1112_ $$aThe 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)$$cVolos$$d2024-07-02 - 2024-07-05$$gSMACD 2024$$wGreece
001032434 245__ $$a3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2 based Memristors
001032434 260__ $$c2024
001032434 300__ $$a1-4
001032434 3367_ $$2ORCID$$aCONFERENCE_PAPER
001032434 3367_ $$033$$2EndNote$$aConference Paper
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001032434 3367_ $$0PUB:(DE-HGF)8$$2PUB:(DE-HGF)$$aContribution to a conference proceedings$$bcontrib$$mcontrib$$s1736947639_32443
001032434 520__ $$aA high voltage (HV) that is usually not availablein modern nodes is required to form memristors. A scalable implementation requires the HV to be generated on chip and this work proposes such a generator. In a 28 nm CMOS process, a three-stage charge pump (CP) is designed in the absence of HV-transistors. For the HfO2-based memristor electroforming (EF), a developed CP runs with an efficiency of 46.5% at an output voltage of 3.35 V and a load current of 184.9 μA from a 1.8 V supply. The optimum design strategy for a cross-coupled charge pump (CC-CP) is explained for a low ripple < 6 mV, while at the same time ensuring lower capacitor value and high reliability. The results of an over-voltage analytical investigation have important ramifications for lowering the overall area without compromising output voltage or CP efficiency. Monte Carlo simulation for 200 samples were also performed to verify the design's robustness. However, the proposed design can be readily extended to any memristor application or material, thereby paving the way forthe integration of fully integrated chips (ICs) for memristor EF in smaller technology nodes.
001032434 536__ $$0G:(DE-HGF)POF4-5234$$a5234 - Emerging NC Architectures (POF4-523)$$cPOF4-523$$fPOF IV$$x0
001032434 536__ $$0G:(DE-82)BMBF-16ME0398K$$aBMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K)$$cBMBF-16ME0398K$$x1
001032434 7001_ $$0P:(DE-Juel1)176328$$aAshok, Arun$$b1
001032434 7001_ $$0P:(DE-Juel1)145837$$aZambanini, Andre$$b2
001032434 7001_ $$0P:(DE-HGF)0$$aGeläschus, Anton Ulrich$$b3
001032434 7001_ $$0P:(DE-Juel1)159350$$aGrewing, Christian$$b4
001032434 7001_ $$0P:(DE-HGF)0$$aBahr, Andreas$$b5
001032434 7001_ $$0P:(DE-Juel1)142562$$avan Waasen, Stefan$$b6
001032434 773__ $$a10.1109/SMACD61181.2024.10745430
001032434 8564_ $$uhttps://ieeexplore.ieee.org/document/10745430
001032434 8564_ $$uhttps://juser.fz-juelich.de/record/1032434/files/3_point_35V_High_Voltage_Electroforming_Generator_in_28nm_with_5_point_3mV_ripple_and_46_percent_efficiency_for_HfO2_based_memristors.pdf$$yRestricted
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001032434 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)201575$$aForschungszentrum Jülich$$b0$$kFZJ
001032434 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)176328$$aForschungszentrum Jülich$$b1$$kFZJ
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001032434 9101_ $$0I:(DE-HGF)0$$6P:(DE-HGF)0$$aHamburg University of Technology$$b3
001032434 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)159350$$aForschungszentrum Jülich$$b4$$kFZJ
001032434 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)142562$$aForschungszentrum Jülich$$b6$$kFZJ
001032434 9131_ $$0G:(DE-HGF)POF4-523$$1G:(DE-HGF)POF4-520$$2G:(DE-HGF)POF4-500$$3G:(DE-HGF)POF4$$4G:(DE-HGF)POF$$9G:(DE-HGF)POF4-5234$$aDE-HGF$$bKey Technologies$$lNatural, Artificial and Cognitive Information Processing$$vNeuromorphic Computing and Network Dynamics$$x0
001032434 9141_ $$y2024
001032434 9201_ $$0I:(DE-Juel1)ZEA-2-20090406$$kZEA-2$$lZentralinstitut für Elektronik$$x0
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001032434 981__ $$aI:(DE-Juel1)PGI-4-20110106