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| Hauptseite > Publikationsdatenbank > 3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2 based Memristors > print |
| Hauptseite > Publikationsdatenbank > 3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2 based Memristors > print |
| 001 | 1032434 | ||
| 005 | 20250610131452.0 | ||
| 024 | 7 | _ | |a 10.1109/SMACD61181.2024.10745430 |2 doi |
| 024 | 7 | _ | |a WOS:001453403300039 |2 WOS |
| 037 | _ | _ | |a FZJ-2024-06240 |
| 041 | _ | _ | |a English |
| 100 | 1 | _ | |a Shamookh, Muhammad |0 P:(DE-Juel1)201575 |b 0 |e Corresponding author |
| 111 | 2 | _ | |a The 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) |g SMACD 2024 |c Volos |d 2024-07-02 - 2024-07-05 |w Greece |
| 245 | _ | _ | |a 3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2 based Memristors |
| 260 | _ | _ | |c 2024 |
| 300 | _ | _ | |a 1-4 |
| 336 | 7 | _ | |a CONFERENCE_PAPER |2 ORCID |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
| 336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a Output Types/Conference Paper |2 DataCite |
| 336 | 7 | _ | |a Contribution to a conference proceedings |b contrib |m contrib |0 PUB:(DE-HGF)8 |s 1736947639_32443 |2 PUB:(DE-HGF) |
| 520 | _ | _ | |a A high voltage (HV) that is usually not availablein modern nodes is required to form memristors. A scalable implementation requires the HV to be generated on chip and this work proposes such a generator. In a 28 nm CMOS process, a three-stage charge pump (CP) is designed in the absence of HV-transistors. For the HfO2-based memristor electroforming (EF), a developed CP runs with an efficiency of 46.5% at an output voltage of 3.35 V and a load current of 184.9 μA from a 1.8 V supply. The optimum design strategy for a cross-coupled charge pump (CC-CP) is explained for a low ripple < 6 mV, while at the same time ensuring lower capacitor value and high reliability. The results of an over-voltage analytical investigation have important ramifications for lowering the overall area without compromising output voltage or CP efficiency. Monte Carlo simulation for 200 samples were also performed to verify the design's robustness. However, the proposed design can be readily extended to any memristor application or material, thereby paving the way forthe integration of fully integrated chips (ICs) for memristor EF in smaller technology nodes. |
| 536 | _ | _ | |a 5234 - Emerging NC Architectures (POF4-523) |0 G:(DE-HGF)POF4-5234 |c POF4-523 |f POF IV |x 0 |
| 536 | _ | _ | |a BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) |0 G:(DE-82)BMBF-16ME0398K |c BMBF-16ME0398K |x 1 |
| 700 | 1 | _ | |a Ashok, Arun |0 P:(DE-Juel1)176328 |b 1 |
| 700 | 1 | _ | |a Zambanini, Andre |0 P:(DE-Juel1)145837 |b 2 |
| 700 | 1 | _ | |a Geläschus, Anton Ulrich |0 P:(DE-HGF)0 |b 3 |
| 700 | 1 | _ | |a Grewing, Christian |0 P:(DE-Juel1)159350 |b 4 |
| 700 | 1 | _ | |a Bahr, Andreas |0 P:(DE-HGF)0 |b 5 |
| 700 | 1 | _ | |a van Waasen, Stefan |0 P:(DE-Juel1)142562 |b 6 |
| 773 | _ | _ | |a 10.1109/SMACD61181.2024.10745430 |
| 856 | 4 | _ | |u https://ieeexplore.ieee.org/document/10745430 |
| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/1032434/files/3_point_35V_High_Voltage_Electroforming_Generator_in_28nm_with_5_point_3mV_ripple_and_46_percent_efficiency_for_HfO2_based_memristors.pdf |y Restricted |
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| 910 | 1 | _ | |a Hamburg University of Technology |0 I:(DE-HGF)0 |b 3 |6 P:(DE-HGF)0 |
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| 913 | 1 | _ | |a DE-HGF |b Key Technologies |l Natural, Artificial and Cognitive Information Processing |1 G:(DE-HGF)POF4-520 |0 G:(DE-HGF)POF4-523 |3 G:(DE-HGF)POF4 |2 G:(DE-HGF)POF4-500 |4 G:(DE-HGF)POF |v Neuromorphic Computing and Network Dynamics |9 G:(DE-HGF)POF4-5234 |x 0 |
| 914 | 1 | _ | |y 2024 |
| 920 | 1 | _ | |0 I:(DE-Juel1)ZEA-2-20090406 |k ZEA-2 |l Zentralinstitut für Elektronik |x 0 |
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| 981 | _ | _ | |a I:(DE-Juel1)PGI-4-20110106 |
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