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@INPROCEEDINGS{Neftci:1033659,
      author       = {Neftci, Emre and Lohoff, Jamie and Yu, Zhenming and
                      Finkbeiner, Jan Robert and Kaya, Anil and Stewart, Kenneth
                      and Lui, Hin Wai},
      title        = {{I}nterfacing {N}euromorphic {H}ardware with {M}achine
                      {L}earning {F}rameworks - {A} {R}eview},
      address      = {New York},
      publisher    = {Association for Computing Machinery},
      reportid     = {FZJ-2024-06531},
      isbn         = {10.1145/3589737.3605967},
      pages        = {270/ Article No. 16},
      year         = {2023},
      comment      = {ICONS '23: Proceedings of the 2023 International Conference
                      on Neuromorphic Systems},
      booktitle     = {ICONS '23: Proceedings of the 2023
                       International Conference on
                       Neuromorphic Systems},
      abstract     = {With the emergence of neuromorphic hardware as a promising
                      low-power parallel computing platform, the need for tools
                      that allow researchers and engineers to efficiently interact
                      with such hardware is rapidly growing. Machine learning
                      frameworks like Tensorflow, PyTorch and JAX have been
                      instrumental for the success of machine learning in recent
                      years as they enable seamless interaction with traditional
                      machine learning accelerators such as GPUs and TPUs. In
                      stark contrast, interfacing with neuromorphic hardware
                      remains difficult since the aforementioned frameworks do not
                      address the challenges associated with mapping neural
                      network models and algorithms to physical hardware. In this
                      paper, we review the various strategies employed throughout
                      the neuromorphic computing community to tackle these
                      challenges and categorize them according to their
                      methodologies and implementation effort. This classification
                      serves as a guideline for device engineers and software
                      developers alike to enable them to choose the best-fit
                      solution in regard of their demands and available resources.
                      Finally, we provide a JAX-based proof-of-concept
                      implementation of a compilation pipeline tailored to the
                      needs of researchers in the early stages of device
                      development, where parts of the computational graph can be
                      mapped onto custom hardware via operations exposed through a
                      C++ or Python interface. The code is available at
                      https://github.com/PGI15/xbarax.},
      month         = {Aug},
      date          = {2023-08-01},
      organization  = {ICONS 2023, Santa Fe (Mexico), 1 Aug
                       2023 - 3 Aug 2023},
      cin          = {PGI-15},
      cid          = {I:(DE-Juel1)PGI-15-20210701},
      pnm          = {5234 - Emerging NC Architectures (POF4-523)},
      pid          = {G:(DE-HGF)POF4-5234},
      typ          = {PUB:(DE-HGF)8 / PUB:(DE-HGF)7},
      url          = {https://juser.fz-juelich.de/record/1033659},
}