Hauptseite > Publikationsdatenbank > On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core > print |
001 | 1033974 | ||
005 | 20250129092414.0 | ||
024 | 7 | _ | |a 10.34734/FZJ-2024-06810 |2 datacite_doi |
037 | _ | _ | |a FZJ-2024-06810 |
041 | _ | _ | |a English |
100 | 1 | _ | |a Zhao, Wei |0 P:(DE-Juel1)203161 |b 0 |u fzj |
111 | 2 | _ | |a 31st IEEE International Conference on Electronics Circuits and Systems |g ICECS'24 |c Nancy |d 2024-11-18 - 2024-11-20 |w France |
245 | _ | _ | |a On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core |
260 | _ | _ | |c 2024 |
336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
336 | 7 | _ | |a Other |2 DataCite |
336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
336 | 7 | _ | |a conferenceObject |2 DRIVER |
336 | 7 | _ | |a LECTURE_SPEECH |2 ORCID |
336 | 7 | _ | |a Conference Presentation |b conf |m conf |0 PUB:(DE-HGF)6 |s 1733815182_7466 |2 PUB:(DE-HGF) |x After Call |
520 | _ | _ | |a Advancements in memory technology havepositioned memristors at the forefront of non-volatile memoryapplications, necessitating precise control mechanisms toaccurately program memristor cells to their respective states.This study delves into the utilization of a RISC-V processor andPWM generators to configure registers for analog conductancecontrol of crossbar memristor array architecture for accuratevoltage and current mode operations. The core contribution isthe development of a flexible and efficient control algorithmspecifically designed for RISC-V. A Universal VerificationMethodology Framework (UVMF) testbench is employedto validate control signals, ensuring their accuracy priorto hardware implementation. Results indicate significantenhancements in control efficiency, underlining the potential forintegrating RISC-V with memristor technology. |
536 | _ | _ | |a BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) |0 G:(DE-82)BMBF-16ME0398K |c BMBF-16ME0398K |x 0 |
536 | _ | _ | |a 5234 - Emerging NC Architectures (POF4-523) |0 G:(DE-HGF)POF4-5234 |c POF4-523 |f POF IV |x 1 |
650 | 2 | 7 | |a Others |0 V:(DE-MLZ)SciArea-250 |2 V:(DE-HGF) |x 0 |
650 | 1 | 7 | |a Engineering, Industrial Materials and Processing |0 V:(DE-MLZ)GC-1601-2016 |2 V:(DE-HGF) |x 0 |
700 | 1 | _ | |a Kuriakose, Neethu |0 P:(DE-Juel1)188691 |b 1 |u fzj |
700 | 1 | _ | |a Kusuma, Sabitha |0 P:(DE-Juel1)187432 |b 2 |u fzj |
700 | 1 | _ | |a Ammari, Abdelaziz |0 P:(DE-Juel1)177867 |b 3 |u fzj |
700 | 1 | _ | |a Ashok, Arun |0 P:(DE-Juel1)176328 |b 4 |u fzj |
700 | 1 | _ | |a Grewing, Christian |0 P:(DE-Juel1)159350 |b 5 |u fzj |
700 | 1 | _ | |a Zambanini, Andre |0 P:(DE-Juel1)145837 |b 6 |u fzj |
700 | 1 | _ | |a van Waasen, Stefan |0 P:(DE-Juel1)142562 |b 7 |u fzj |
856 | 4 | _ | |u https://juser.fz-juelich.de/record/1033974/files/On-Chip%20Advanced%20Control%20Algorithm%20for%20Memristor%20Operations%20with%20Integrated%20RISC-V%20Core.pdf |y OpenAccess |
909 | C | O | |o oai:juser.fz-juelich.de:1033974 |p openaire |p open_access |p VDB |p driver |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 0 |6 P:(DE-Juel1)203161 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 1 |6 P:(DE-Juel1)188691 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 2 |6 P:(DE-Juel1)187432 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 3 |6 P:(DE-Juel1)177867 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 4 |6 P:(DE-Juel1)176328 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 5 |6 P:(DE-Juel1)159350 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 6 |6 P:(DE-Juel1)145837 |
910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 7 |6 P:(DE-Juel1)142562 |
913 | 1 | _ | |a DE-HGF |b Key Technologies |l Natural, Artificial and Cognitive Information Processing |1 G:(DE-HGF)POF4-520 |0 G:(DE-HGF)POF4-523 |3 G:(DE-HGF)POF4 |2 G:(DE-HGF)POF4-500 |4 G:(DE-HGF)POF |v Neuromorphic Computing and Network Dynamics |9 G:(DE-HGF)POF4-5234 |x 0 |
914 | 1 | _ | |y 2024 |
915 | _ | _ | |a OpenAccess |0 StatID:(DE-HGF)0510 |2 StatID |
920 | _ | _ | |l yes |
920 | 1 | _ | |0 I:(DE-Juel1)ZEA-2-20090406 |k ZEA-2 |l Zentralinstitut für Elektronik |x 0 |
980 | 1 | _ | |a FullTexts |
980 | _ | _ | |a conf |
980 | _ | _ | |a VDB |
980 | _ | _ | |a UNRESTRICTED |
980 | _ | _ | |a I:(DE-Juel1)ZEA-2-20090406 |
981 | _ | _ | |a I:(DE-Juel1)PGI-4-20110106 |
Library | Collection | CLSMajor | CLSMinor | Language | Author |
---|