| Hauptseite > Publikationsdatenbank > On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core > print |
| 001 | 1033974 | ||
| 005 | 20250129092414.0 | ||
| 024 | 7 | _ | |a 10.34734/FZJ-2024-06810 |2 datacite_doi |
| 037 | _ | _ | |a FZJ-2024-06810 |
| 041 | _ | _ | |a English |
| 100 | 1 | _ | |a Zhao, Wei |0 P:(DE-Juel1)203161 |b 0 |u fzj |
| 111 | 2 | _ | |a 31st IEEE International Conference on Electronics Circuits and Systems |g ICECS'24 |c Nancy |d 2024-11-18 - 2024-11-20 |w France |
| 245 | _ | _ | |a On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core |
| 260 | _ | _ | |c 2024 |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
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| 520 | _ | _ | |a Advancements in memory technology havepositioned memristors at the forefront of non-volatile memoryapplications, necessitating precise control mechanisms toaccurately program memristor cells to their respective states.This study delves into the utilization of a RISC-V processor andPWM generators to configure registers for analog conductancecontrol of crossbar memristor array architecture for accuratevoltage and current mode operations. The core contribution isthe development of a flexible and efficient control algorithmspecifically designed for RISC-V. A Universal VerificationMethodology Framework (UVMF) testbench is employedto validate control signals, ensuring their accuracy priorto hardware implementation. Results indicate significantenhancements in control efficiency, underlining the potential forintegrating RISC-V with memristor technology. |
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| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/1033974/files/On-Chip%20Advanced%20Control%20Algorithm%20for%20Memristor%20Operations%20with%20Integrated%20RISC-V%20Core.pdf |y OpenAccess |
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