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@INPROCEEDINGS{Issac:1034283,
      author       = {Issac, Tom Glint and Pechimuthu, M. and Mekie, J.},
      title        = {{D}eep{F}rack: {A} {C}omprehensive {F}ramework for {L}ayer
                      {F}usion, {F}ace {T}iling, and {E}fficient {M}apping in
                      {DNN} {H}ardware {A}ccelerators},
      reportid     = {FZJ-2024-07072},
      year         = {2024},
      month         = {Mar},
      date          = {2024-03-25},
      organization  = {Design, Automation $\&$ Test in Europe
                       Conference $\&$ Exhibition (DATE).
                       IEEE, 2024, Valencia (Spain), 25 Mar
                       2024 - 27 Mar 2024},
      subtyp        = {Other},
      cin          = {PGI-10},
      cid          = {I:(DE-Juel1)PGI-10-20170113},
      pnm          = {5234 - Emerging NC Architectures (POF4-523) / BMBF
                      16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien
                      der künstlichen Intelligenz für die Elektronik der Zukunft
                      - NEUROTEC II - (BMBF-16ME0398K) / BMBF 03ZU1106AB -
                      NeuroSys: "Memristor Crossbar Architekturen (Projekt A) - B"
                      (BMBF-03ZU1106AB)},
      pid          = {G:(DE-HGF)POF4-5234 / G:(DE-82)BMBF-16ME0398K /
                      G:(DE-Juel1)BMBF-03ZU1106AB},
      typ          = {PUB:(DE-HGF)6},
      url          = {https://juser.fz-juelich.de/record/1034283},
}