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@INPROCEEDINGS{Issac:1034285,
author = {Issac, Tom Glint},
title = {{A}rchitecting {F}ast and {E}nergy-{E}fficient {H}ardware
{A}ccelerators for {E}merging {ML} {W}orkloads {U}sing
{H}ardware-{S}oftware {C}o-{D}esign},
reportid = {FZJ-2024-07074},
year = {2024},
month = {Mar},
date = {2024-03-25},
organization = {PhD Forum, Design, Automation $\&$
Test in Europe Conference $\&$
Exhibition, Valencia (Spain), 25 Mar
2024 - 27 Mar 2024},
subtyp = {Other},
cin = {PGI-10},
cid = {I:(DE-Juel1)PGI-10-20170113},
pnm = {5234 - Emerging NC Architectures (POF4-523) / BMBF
16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien
der künstlichen Intelligenz für die Elektronik der Zukunft
- NEUROTEC II - (BMBF-16ME0398K) / BMBF 16ME0399 -
Verbundprojekt: Neuro-inspirierte Technologien der
künstlichen Intelligenz für die Elektronik der Zukunft -
NEUROTEC II - (BMBF-16ME0399)},
pid = {G:(DE-HGF)POF4-5234 / G:(DE-82)BMBF-16ME0398K /
G:(DE-82)BMBF-16ME0399},
typ = {PUB:(DE-HGF)24},
url = {https://juser.fz-juelich.de/record/1034285},
}