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@ARTICLE{CabreraGalicia:1034516,
author = {Cabrera-Galicia, Alfonso R. and Ashok, Arun and Vliex,
Patrick and Kruth, Andre and Zambanini, André and van
Waasen, Stefan},
title = {{V}oltage {R}eference and {V}oltage {R}egulator for the
{C}ryogenic {P}erformance {E}valuation of the 22nm {FDSOI}
{T}echnology},
journal = {IEEE open journal of circuits and systems},
volume = {5},
issn = {2644-1225},
address = {New York, NY},
publisher = {IEEE},
reportid = {FZJ-2024-07279},
pages = {377 - 386},
year = {2024},
abstract = {This paper presents the design and cryogenic electrical
characterization of a voltage reference and a linear voltage
regulator at temperatures between 6 K and 300 K. Both
circuits are employed as test vehicles for the experimental
performance evaluation of the 22 nm FDSOI MOS technology
when used as platform for the development of cryogenic
analog systems, whose role is relevant in Quantum Computing
(QC) applications. Additionally, we report the impact that
MOS transistor cryogenic phenomena have over these circuits
and propose to take advantage of some of those phenomena in
analog circuit design. In particular, we focus on the
cryogenic threshold voltage (Vth) saturation, the
transconductance (gm) increase and the low frequency (LF)
excess noise. Our experimental results indicate that the
cryogenic Vth saturation and the gm increase can be used as
circuit design tools, while the LF excess noise is a
performance handicap for cryogenic analog circuits.},
cin = {ZEA-2},
ddc = {004},
cid = {I:(DE-Juel1)ZEA-2-20090406},
pnm = {5223 - Quantum-Computer Control Systems and Cryoelectronics
(POF4-522)},
pid = {G:(DE-HGF)POF4-5223},
typ = {PUB:(DE-HGF)16},
UT = {WOS:001381324400003},
doi = {10.1109/OJCAS.2024.3466395},
url = {https://juser.fz-juelich.de/record/1034516},
}