% IMPORTANT: The following is UTF-8 encoded. This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.
@INPROCEEDINGS{Siegel:1037670,
author = {Siegel, Sebastian and Ziegler, Tobias and Bouhadjar, Younes
and Tetzlaff, Tom and Waser, Rainer and Dittmann, Regina and
Wouters, Dirk},
title = {{N}euromorphic sequence learning with memristive in-memory
computing},
reportid = {FZJ-2025-00835},
year = {2024},
abstract = {Information processing in the neo-cortex happens in a
sequential manner and sequence learning is considered a key
functionality of the human brain. Even though there are
machine learning solutions to these problems, they, unlike
the biological brain, often require large amounts of
training data and suffer from a high energy consumption.
Therefore, in this project we take the neuromorphic approach
of bringing the biological principles of sparse neural
activity and in-memory computing into electronic hardware.
Thereby, our goal is to achieve a robust and
energy-efficient solution for sequence learning.The
Hierarchical Temporal Memory[1] concept and its biologically
plausible version, SpikingTM[2], describe a possible
algorithm for sequence learning in the neo-cortex. We prove
that this algorithm can operate with memristive synapses[3].
Memristive devices are an emerging non-volatile memory and a
prominent candidate for in-memory computing substrates. In
order to fully leverage the possibilities of these devices,
we adapt the SpikingTM algorithm and create a complete
analog / mixed signal system model around a synaptic array
of memristive devices[4]. We demonstrate sequence learning
by sparse neural activity and showcase that the use of
memristive devices leads to a significant gain of energy
efficiency. Lastly, we validate the system with real
memristive synaptic arrays on a custom nanometer CMOS
demonstrator chip by performing complex sequence learning
tasks with our memristive algorithm (MemSpikingTM) on
hardware[5].This project shows the complete neuromorphic
journey from a bio-plausible algorithm for the brain
functionality over a hardware-aware adaption for emerging
memristive device technology and a complete system model to
a successful hardware demonstration. We showcase that by
combining the biological principles of sparse activity and
connectivity with a memristive in-memory computing
substrate, we can fulfil the promise of robust brain-like
functionality and energy efficiency.},
month = {Jun},
date = {2024-06-12},
organization = {Helmholtz AI Conference, Düsseldorf
(Germany), 12 Jun 2024 - 14 Jun 2024},
subtyp = {Other},
cin = {PGI-14},
cid = {I:(DE-Juel1)PGI-14-20210412},
pnm = {5234 - Emerging NC Architectures (POF4-523) / 5233 -
Memristive Materials and Devices (POF4-523)},
pid = {G:(DE-HGF)POF4-5234 / G:(DE-HGF)POF4-5233},
typ = {PUB:(DE-HGF)6},
url = {https://juser.fz-juelich.de/record/1037670},
}