%0 Conference Paper
%A Schlepphorst, Simon
%A Krieg, Stefan
%T Porting Lattice QCD benchmark to upcoming STX stencil/tensor accelerator
%M FZJ-2025-01009
%D 2024
%X Developed under the European Processor Initiative (EPI) the STX stencil/tensor accelerator aims to achieve a 5-10x higher energy efficiency over general purpose compute units. The architecture consists of specialised MIMD compute units which are supported and controlled by RISC-V cores. We describe a co-design effort between hardware, software, and application development focused around porting a LQCD benchmark to this new architecture.
%B 41st Lattice Conference
%C 28 Jul 2024 - 3 Aug 2024, Liverpool (UK)
Y2 28 Jul 2024 - 3 Aug 2024
M2 Liverpool, UK
%F PUB:(DE-HGF)6
%9 Conference Presentation
%U https://juser.fz-juelich.de/record/1037866