Contribution to a conference proceedings FZJ-2025-01112

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Accurate Mapping of RNNs on Neuromorphic Hardware with Adaptive Spiking Neurons

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2024
IEEE

2024 International Conference on Neuromorphic Systems (ICONS), ArlingtonArlington, VA, 30 Jul 2024 - 2 Aug 20242024-07-302024-08-02 IEEE 376-380 () [10.1109/ICONS62911.2024.00064]

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Abstract: Thanks to their parallel and sparse activity features, recurrent neural networks (RNNs) are well-suited for hardware implementation in low-power neuromorphic hardware. However, mapping rate-based RNNs to hardware-compatible spiking neural networks (SNNs) remains challenging. Here, we present a ΣΔ−low-pass RNN (lpRNN): an RNN architecture employing an adaptive spiking neuron model that encodes signals using ΣΔ-modulation and enables precise mapping. The ΣΔ-neuron communicates graded values using spike timing, and the dynamics of the IpRNN are set to match typical timescales for processing natural signals, such as speech. Our approach integrates rate and temporal coding, offering a robust solution for efficient and accurate conversion of RNNs to SNNs. We demonstrate the implementation of the IpRNN on Intel's neuromorphic research chip Loihi, achieving state-of-the-art classification results on audio benchmarks using 3-bit weights. These results call for a deeper investigation of recurrency and adaptation in event-based systems, which may lead to insights for edge computing applications where power-efficient real-time inference is required.


Contributing Institute(s):
  1. Neuromorphic Software Eco System (PGI-15)
Research Program(s):
  1. 5234 - Emerging NC Architectures (POF4-523) (POF4-523)

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 Record created 2025-01-24, last modified 2025-08-04


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