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@PHDTHESIS{CabreraGalicia:1046654,
      author       = {Cabrera Galicia, Alfonso Rafael},
      title        = {{A} {S}ystem for the {C}ryogenic {P}ower {M}anagement of
                      {Q}uantum {C}omputing {E}lectronics: {D}evelopment,
                      {I}ntegration, and {T}est},
      volume       = {114},
      school       = {Duisburg-Essen},
      type         = {Dissertation},
      address      = {Jülich},
      publisher    = {Forschungszentrum Jülich GmbH Zentralbibliothek, Verlag},
      reportid     = {FZJ-2025-03886},
      isbn         = {978-3-95806-844-5},
      series       = {Schriften des Forschungszentrums Jülich Reihe Information
                      / Information},
      pages        = {xxv, 110, lviii},
      year         = {2025},
      note         = {Dissertation, Duisburg-Essen, 2025},
      abstract     = {In view of the post-Moore’s law era, new computational
                      paradigms that could serve as powerful alternatives to the
                      classical computing are under development. One of those
                      paradigms is Quantum Computing (QC). By using the quantum
                      mechanical properties of superposition and entanglement via
                      the manipulation of a large number of qubits, QC systems
                      promise to speed up the finding of solutions to the
                      computational challenges faced in cryptography, optimization
                      of different processes, and quantum systems simulation.
                      These applications position the QC systems as powerful tools
                      for humanity. However, the design, assembly, deployment and
                      operation of a QC system are not simple tasks. This is
                      because QC devices, such as superconductive qubits or
                      semiconductor quantum dots, require an ambient temperature
                      lower than 100mK in order to reduce the influence of heat
                      sources that could disrupt the qubits state information and
                      coherence. Also, the only practical way in which a QC device
                      can be subjected to such low temperatures is by means of a
                      dilution refrigerator, a complex machine with limited room
                      for Devices Under Test (DUTs), electrical connections for DC
                      and RF signals, and cooling power. In order to increase the
                      QC system performance, such a system must be composed by a
                      high number of fault-tolerant qubits. As well as by hardware
                      and software capable of enabling its scalability. Moreover,
                      it is expected that by incorporating cryogenic CMOS ICs as
                      part of QC systems, the number of connections between the
                      qubits and the Room Temperature (RT) electronics will be
                      reduced, relaxing the dilution refrigerator requirementsand
                      allowing the system scalability. In addition, the signal
                      integrity of the signals controlling the qubits could be
                      improved by the shorter interface with the local cryogenic
                      electronics based on ICs. But the most important advantage
                      offered by CMOS IC technology is its potential integration
                      with qubit devices. In particular, the semiconductor gate
                      defined quantum dot, a device that stores and controls an
                      electron operating as qubit. Thus, the development of
                      analog, digital, and mixed-signal cryogenic CMOS ICs has
                      attracted significant attention in the last years. As it has
                      been demonstrated that IC technology can be an important
                      part and key enabler of the QC systems scalability. This
                      work contributes to cryogenic analog MOS circuit design
                      discipline through the development, integration and test of
                      a cryogenic Power Management Unit (PMU) composed by a CMOS
                      IC and additional passive components. The cryogenic PMU is
                      developed with a 22 nm FDSOI technology, as it supplies
                      MOSFETs that can operate at Cryogenic Temperatures (CTs)
                      without significant performance degradation. Ultimately, the
                      goal is to provide a regulated and lownoise voltage supply
                      to other circuit blocks located at CT environments close to
                      4 K, reducing the amount of DC connections between the RT
                      equipment and the cryogenic electronics. Hence, the QC
                      systems scalability effortsare thereby supported.},
      cin          = {PGI-4},
      cid          = {I:(DE-Juel1)PGI-4-20110106},
      pnm          = {5223 - Quantum-Computer Control Systems and Cryoelectronics
                      (POF4-522)},
      pid          = {G:(DE-HGF)POF4-5223},
      typ          = {PUB:(DE-HGF)3 / PUB:(DE-HGF)11},
      url          = {https://juser.fz-juelich.de/record/1046654},
}