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005     20251023202110.0
024 7 _ |a 10.34734/FZJ-2025-04146
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037 _ _ |a FZJ-2025-04146
041 _ _ |a English
100 1 _ |a Dietz Romero, Pau
|0 P:(DE-Juel1)204256
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|e Corresponding author
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111 2 _ |a Nano Conference 2025
|c Dortmund
|d 2025-09-30 - 2025-10-01
|w Germany
245 _ _ |a Automated Co-Design of Qubits and Cryogenic Electronics
260 _ _ |c 2025
336 7 _ |a Conference Paper
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336 7 _ |a INPROCEEDINGS
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520 _ _ |a Integrating cryogenic integrated circuits with qubits is a promising way to scale quantum computers. Signals created and detected in close proximity to the qubits inside the cryostat reduce wiring bottlenecks and signal distortion. This approach also minimizes the footprint and cost while enabling modular quantum processors. However, IC design requires significant development effort and is prone to errors. It relies heavily on accurate simulations to explore the design space and validate circuit designs. Additionally, cryostats offer limited cooling and space capabilities, which strictly restrict the power consumption and size of electronic designs. To overcome these challenges, we introduce a co-design framework [1] that directly connects the signals from tailored electronics to qubit performance, as shown in Fig. 1. Within our framework, the integrated circuits are represented at three abstraction levels: as an ideal arbitrary signal source, as a behavioral model, and as a transistor-level SPICE model. Our framework allows for the conception, design, and optimization of cryogenic electronics with awareness of power consumption and qubit performance. As a use case, we optimized two circuits for shuttling signal generation for spin qubits as required in [2] and illustrated in Figure 2. The qubit metric used is the orbital splitting of the shuttled electron, which indicates how robust the spin state is against disturbances. We optimized the electronic parameters to reduce the power consumption of the two cryogenic signal generation circuits while maintaining the minimum required orbital splitting. Based on the results of our circuit design simulations, we propose replacing the room-temperature electronics used for spin qubit shuttling with tailored integrated electronics.1. P. Dietz Romero, C. Toprak, L. Duipmans, S. van Waasen and L. Geck, SMACD (2025) 2. M. Künne, A. Willmes, M. Oberländer, C. Gorjaew, J. Teske, H. Bhardwaj, M. Beer, E. Kammerloher, R. Otten, I. Seidel, R. Xue, L. Schreiber and H. Bluhm, Nature Communications (2024)
536 _ _ |a 5223 - Quantum-Computer Control Systems and Cryoelectronics (POF4-522)
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700 1 _ |a Toprak, Caner
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700 1 _ |a Duipmans, Lammert
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700 1 _ |a van Waasen, Stefan
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700 1 _ |a Geck, Lotte
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856 4 _ |u https://juser.fz-juelich.de/record/1047197/files/Nanoconference%20Dietz%20Romero%20Poster.pdf
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