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| Hauptseite > Publikationsdatenbank > Addressable fault-tolerant universal quantum gate operations for high-rate lift-connected surface codes > print |
| Hauptseite > Publikationsdatenbank > Addressable fault-tolerant universal quantum gate operations for high-rate lift-connected surface codes > print |
| 001 | 1048966 | ||
| 005 | 20251211202155.0 | ||
| 024 | 7 | _ | |a arXiv:2511.10191 |2 arXiv |
| 024 | 7 | _ | |a 10.34734/FZJ-2025-05063 |2 datacite_doi |
| 037 | _ | _ | |a FZJ-2025-05063 |
| 088 | _ | _ | |a arXiv:2511.10191 |2 arXiv |
| 100 | 1 | _ | |a Old, Josias |0 P:(DE-Juel1)192118 |b 0 |e Corresponding author |u fzj |
| 245 | _ | _ | |a Addressable fault-tolerant universal quantum gate operations for high-rate lift-connected surface codes |
| 260 | _ | _ | |c 2025 |
| 336 | 7 | _ | |a Preprint |b preprint |m preprint |0 PUB:(DE-HGF)25 |s 1765435657_26509 |2 PUB:(DE-HGF) |
| 336 | 7 | _ | |a WORKING_PAPER |2 ORCID |
| 336 | 7 | _ | |a Electronic Article |0 28 |2 EndNote |
| 336 | 7 | _ | |a preprint |2 DRIVER |
| 336 | 7 | _ | |a ARTICLE |2 BibTeX |
| 336 | 7 | _ | |a Output Types/Working Paper |2 DataCite |
| 500 | _ | _ | |a 13 pages, 12 Figures |
| 520 | _ | _ | |a Quantum low-density parity check (qLDPC) codes are among the leading candidates to realize error-corrected quantum memories with low qubit overhead. Potentially high encoding rates and large distance relative to their block size make them appealing for practical suppression of noise in near-term quantum computers. In addition to increased qubit-connectivity requirements compared to more conventional topological quantum error correcting codes, qLDPC codes remain notoriously hard to compute with. In this work, we introduce a construction to implement all Clifford quantum gate operations on the recently introduced lift-connected surface (LCS) codes (Old et al. 2024). These codes can be implemented in a 3D-local architecture and achieve asymptotic scaling $[[n, \mathcal{O}(n^{1/3}), \mathcal{O}(n^{1/3})]]$. In particular, LCS codes realize favorable instances with small numbers of qubits: For the $[[15,3,3]]$ LCS code, we provide deterministic fault-tolerant (FT) circuits of the logical gate set $\{\overline{H}_i, \overline{S}_i, \overline{C_i X_j}\}_{i,j \in (0,1,2)}$ based on flag qubits. By adding a procedure for FT magic state preparation, we show quantitatively how to realize an FT universal gate set in $d=3$ LCS codes. Numerical simulations indicate that our gate constructions can attain pseudothresholds in the range $p_{\mathrm{th}} \approx 4.8\cdot 10^{-3}-1.2\cdot 10^{-2}$ for circuit-level noise. The schemes use a moderate number of qubits and are therefore feasible for near-term experiments, facilitating progress for fault-tolerant error corrected logic in high-rate qLPDC codes. |
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| 588 | _ | _ | |a Dataset connected to DataCite |
| 700 | 1 | _ | |a Bechar, Juval |0 P:(DE-Juel1)201506 |b 1 |
| 700 | 1 | _ | |a Müller, Markus |0 P:(DE-Juel1)179396 |b 2 |u fzj |
| 700 | 1 | _ | |a Heußen, Sascha |0 P:(DE-Juel1)184903 |b 3 |
| 856 | 4 | _ | |u https://arxiv.org/abs/2511.10191 |
| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/1048966/files/old2025addressable.pdf |y OpenAccess |
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