TY  - CONF
AU  - Schlepphorst, Simon
AU  - Krieg, Stefan
TI  - Porting Lattice QCD benchmark to upcoming STX stencil/tensor accelerator
CY  - Trieste, Italy
PB  - Sissa Medialab Trieste, Italy
M1  - FZJ-2025-05555
SP  - 451 pp.
PY  - 2025
AB  - Developed under the European Processor Initiative (EPI), the STX stencil/tensor accelerator aims to achieve a 5-10x higher energy efficiency over general purpose compute units. The architecture consists of specialized MIMD compute units which are supported and controlled by RISC-V cores. We describe a co-design effort between hardware, software, and application development focused around porting a LQCD benchmark to this new architecture.
T2  - The 41st International Symposium on Lattice Field Theory
CY  - 28 Jul 2024 - 3 Aug 2024, Liverpool (UK)
Y2  - 28 Jul 2024 - 3 Aug 2024
M2  - Liverpool, UK
LB  - PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
DO  - DOI:10.22323/1.466.0451
UR  - https://juser.fz-juelich.de/record/1049771
ER  -