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@INPROCEEDINGS{Dube:1050456,
      author       = {Dube, Aradhana and Manea, Paul and Gibertini, Paolo and
                      Covi, Erika and Strachan, John Paul},
      title        = {{A}nalog {S}oftmax with {W}ide {I}nput {C}urrent {R}ange
                      for {I}n-{M}emory {C}omputing},
      publisher    = {IEEE},
      reportid     = {FZJ-2026-00226},
      pages        = {1-5},
      year         = {2025},
      comment      = {2025 IEEE International Symposium on Circuits and Systems
                      (ISCAS) : [Proceedings] - IEEE, 2025. - ISBN
                      979-8-3503-5683-0 - doi:10.1109/ISCAS56072.2025.11043251},
      booktitle     = {2025 IEEE International Symposium on
                       Circuits and Systems (ISCAS) :
                       [Proceedings] - IEEE, 2025. - ISBN
                       979-8-3503-5683-0 -
                       doi:10.1109/ISCAS56072.2025.11043251},
      abstract     = {The Softmax activation function plays a pivotalrole in both
                      the attention mechanism of Transformers andin the final
                      layer of neural networks performing classification.The
                      Softmax function outputs probabilities by normalizing
                      theinput values, emphasizing differences among them to
                      highlightthe largest values. In digital implementations, the
                      complexityof softmax grows linearly with the number of
                      inputs. Incontrast, analog implementations enable parallel
                      computationswith lower latency. In this work, we demonstrate
                      that thisapproach achieves a more efficient linear scaling
                      of latencyas vector size increases logarithmically. This
                      analog softmaxcircuits are implemented in TSMC 28 nm PDK
                      technology,capable of driving up to 128 inputs and producing
                      an ana-log current output spanning three orders of
                      magnitude. Thestudy examines the circuit’s power
                      consumption, latency, anderror, emphasizing its efficiency
                      compared to the alternativeapproach of converting outputs to
                      digital signals via ADCsand performing the softmax
                      calculation digitally. By reducingreliance on these
                      power-intensive operations, this work aims tosignificantly
                      enhance energy efficiency in in-memory computingsystems.},
      month         = {May},
      date          = {2025-05-25},
      organization  = {2025 IEEE International Symposium on
                       Circuits and Systems (ISCAS), London
                       (United Kingdom), 25 May 2025 - 28 May
                       2025},
      cin          = {PGI-14},
      cid          = {I:(DE-Juel1)PGI-14-20210412},
      pnm          = {5234 - Emerging NC Architectures (POF4-523)},
      pid          = {G:(DE-HGF)POF4-5234},
      typ          = {PUB:(DE-HGF)8 / PUB:(DE-HGF)7},
      doi          = {10.1109/ISCAS56072.2025.11043251},
      url          = {https://juser.fz-juelich.de/record/1050456},
}