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005     20260122203304.0
024 7 _ |a 10.1109/ISCAS56072.2025.11044190
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100 1 _ |a Manea, Paul-Philipp
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111 2 _ |a 2025 IEEE International Symposium on Circuits and Systems (ISCAS)
|c London
|d 2025-05-25 - 2025-05-28
|w United Kingdom
245 _ _ |a Gain Cell-based Analog Content Addressable Memory for Dynamic Associative Tasks in AI
260 _ _ |c 2025
|b IEEE
300 _ _ |a 1-5
336 7 _ |a CONFERENCE_PAPER
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336 7 _ |a Conference Paper
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520 _ _ |a analog Content Addressable Memories (aCAMs)have proven useful for associative Compute-in-Memory (CIM)applications like Decision Trees, Finite State Machines, andHyper-dimensional Computing. While non-volatile implementa-tions using FeFETs and ReRAM devices offer speed, power,and area advantages, they suffer from slow write speeds andlimited write cycles, making them less suitable for computa-tions involving fully dynamic data patterns. To address theselimitations, in this work, we propose a capacitor gain cell-based aCAM designed for dynamic processing, where frequentmemory updates are required. Our system compares analog inputvoltages to boundaries stored in capacitors, enabling efficientdynamic tasks. We demonstrate the application of aCAM withintransformer attention mechanisms by replacing the softmax-scaled dot-product similarity with aCAM similarity, achievingcompetitive results. Circuit simulations on a TSMC 28 nmnode show promising performance in terms of energy efficiency,precision, and latency, making it well-suited for fast, dynamic AIapplications.
536 _ _ |a 5234 - Emerging NC Architectures (POF4-523)
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588 _ _ |a Dataset connected to CrossRef Conference
700 1 _ |a Leroux, Nathan
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700 1 _ |a Neftci, Emre
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700 1 _ |a Strachan, John Paul
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773 _ _ |a 10.1109/ISCAS56072.2025.11044190
856 4 _ |u https://juser.fz-juelich.de/record/1050458/files/Gain_Cell-based_Analog_Content_Addressable_Memory_for_Dynamic_Associative_Tasks_in_AI.pdf
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913 1 _ |a DE-HGF
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