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001050459 1001_ $$0P:(DE-Juel1)192242$$aManea, Paul-Philipp$$b0$$eCorresponding author$$ufzj
001050459 1112_ $$a2025 9th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)$$cHong Kong$$d2025-03-09 - 2025-03-12$$wHong Kong
001050459 245__ $$aContent Addressable Memory Hierarchies for Computing in Memory
001050459 260__ $$bIEEE$$c2025
001050459 29510 $$a2025 9th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) : [Proceedings] - IEEE, 2025. - ISBN 979-8-3315-0416-8 - doi:10.1109/EDTM61175.2025.11040774
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001050459 520__ $$aContent Addressable Memories (CAMs) match inputdata to stored content, ideal for search-intensive taskslike network address lookup and similarity matching.This paper explores CAM hierarchies (similar to thestandard RAM hierarchy), focusing on two implemen-tation layers: non-volatile, analog Content AddressableMemory (aCAM) for static data patterns, and volatile,gain cell-based aCAM for dynamic tasks. Mitigatingkey non-idealities in memristor-based aCAMs increasesstorage from 2 to 4 bits per cell, enhancing performance,capacity, and energy efficiency for Compute in Memory(CIM) applications.
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001050459 7001_ $$0P:(DE-Juel1)194421$$aLeroux, Nathan$$b1$$ufzj
001050459 7001_ $$0P:(DE-Juel1)188145$$aStrachan, John Paul$$b2$$ufzj
001050459 773__ $$a10.1109/EDTM61175.2025.11040774
001050459 8564_ $$uhttps://ieeexplore.ieee.org/abstract/document/11040774
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001050459 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)194421$$aForschungszentrum Jülich$$b1$$kFZJ
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001050459 9201_ $$0I:(DE-Juel1)PGI-14-20210412$$kPGI-14$$lNeuromorphic Compute Nodes$$x0
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