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@INPROCEEDINGS{Yang:1050577,
author = {Yang, Ming-Jay and Nieters, Pascal and Hellwig, Johannes
and Spithouris, Dimitrios and Dittmann, Regina and Pipa,
Gordon and Strachan, John Paul},
title = {{B}iologically {I}nspired {M}ulti-{T}imescale {S}equence
{P}rocessing in {H}ybrid {CMOS}-{M}emristive {H}ardware},
publisher = {IEEE},
reportid = {FZJ-2026-00334},
pages = {1-4},
year = {2025},
comment = {2025 32nd IEEE International Conference on Electronics,
Circuits and Systems (ICECS) : [Proceedings] - IEEE, 2025. -
ISBN 979-8-3315-9585-2 -
doi:10.1109/ICECS66544.2025.11270719},
booktitle = {2025 32nd IEEE International
Conference on Electronics, Circuits and
Systems (ICECS) : [Proceedings] - IEEE,
2025. - ISBN 979-8-3315-9585-2 -
doi:10.1109/ICECS66544.2025.11270719},
abstract = {emporal sequences of spiking activity are a primary means
of neural information encoding, making the extraction of
their structure a fundamental computational challenge in
neuroscience and artificial intelligence. Recent advances in
neuroscience have introduced the concept of dendritic
plateau computation (DPC), a mechanism that emerges from the
interaction of localized plateau potentials across
functionally compartmentalized dendritic branches. Inspired
by this biological paradigm, we propose a memristive
dendritic architecture incorporating a multi-compartmental
neuron model. Critical sequence features are encoded through
tunable resistances at memristive crosspoints, while the
adjustable retention time of volatile memristors is utilized
to modulate plateau duration, thereby aligning temporal
dynamics with application-specific requirements. With the
memristive hardware dendrite, we constructed a two-layer
network of neuron populations for sequence classification.
This work demonstrates the potential advantage of
incorporating the active dendritic processes as fundamental
operation for implementing efficient brain-inspired
computing hardware.},
month = {Nov},
date = {2025-11-17},
organization = {2025 32nd IEEE International
Conference on Electronics, Circuits and
Systems (ICECS), Marrakech (Morocco),
17 Nov 2025 - 19 Nov 2025},
cin = {PGI-14},
cid = {I:(DE-Juel1)PGI-14-20210412},
pnm = {5234 - Emerging NC Architectures (POF4-523) / DFG project
G:(GEPRIS)441959088 - Memristiver Zeitabstandskodierer
(MemTDE) (441959088)},
pid = {G:(DE-HGF)POF4-5234 / G:(GEPRIS)441959088},
typ = {PUB:(DE-HGF)8 / PUB:(DE-HGF)7},
doi = {10.1109/ICECS66544.2025.11270719},
url = {https://juser.fz-juelich.de/record/1050577},
}