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@ARTICLE{Knoll:11285,
      author       = {Knoll, L. and Zhao, Q. T. and Habicht, S. and Urban, C. and
                      Ghyselen, B. and Mantl, S.},
      title        = {{U}ltrathin {N}i {S}ilicides with low contact resistance on
                      {S}trained and {U}nstrained {S}ilicon},
      journal      = {IEEE Electron Device Letters},
      volume       = {31},
      issn         = {0741-3106},
      address      = {New York, NY},
      publisher    = {IEEE},
      reportid     = {PreJuSER-11285},
      pages        = {350 - 352},
      year         = {2010},
      note         = {This work was supported in part by the German Federal
                      Ministry of Education and Research via the MEDEA+ Project
                      DECISIF(2T104) and in part by the Nanosil funding from the
                      European Community under FP7 Grant 216171. The review of
                      this letter was arranged by Editor C.-P. Chang.},
      abstract     = {Ultrathin Ni silicides were formed on silicon-on-insulator
                      (SOI) and biaxially tensile strained SOI (SSOI) substrates.
                      The Ni layer thickness crucially determines the silicide
                      phase formation: With a 3-nm Ni layer, high-quality
                      epitaxial NiSi2 layers were grown at temperatures > 450
                      degrees C, while NiSi was formed with a 5-nm-thick Ni layer.
                      A very thin Pt interlayer, to incorporate Pt into NiSi,
                      improves the thermal stability and the interface roughness
                      and lowers the contact resistivity. The contact resistivity
                      of epitaxial NiSi2 is about one order of magnitude lower
                      than that of a NiSi layer on both As-and B-doped SOI and
                      SSOI.},
      keywords     = {J (WoSType)},
      cin          = {IBN-1 / JARA-FIT},
      ddc          = {620},
      cid          = {I:(DE-Juel1)VDB799 / $I:(DE-82)080009_20140620$},
      pnm          = {Grundlagen für zukünftige Informationstechnologien /
                      NANOSIL - Silicon-based nanostructures and nanodevices for
                      long term nanoelectronics applications (216171)},
      pid          = {G:(DE-Juel1)FUEK412 / G:(EU-Grant)216171},
      shelfmark    = {Engineering, Electrical $\&$ Electronic},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000276017000031},
      doi          = {10.1109/LED.2010.2041028},
      url          = {https://juser.fz-juelich.de/record/11285},
}