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041 _ _ |a eng
082 _ _ |a 620
084 _ _ |2 WoS
|a Engineering, Electrical & Electronic
100 1 _ |0 P:(DE-Juel1)VDB89241
|a Knoll, L.
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245 _ _ |a Ultrathin Ni Silicides with low contact resistance on Strained and Unstrained Silicon
260 _ _ |a New York, NY
|b IEEE
|c 2010
300 _ _ |a 350 - 352
336 7 _ |a Journal Article
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440 _ 0 |0 2464
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500 _ _ |a This work was supported in part by the German Federal Ministry of Education and Research via the MEDEA+ Project DECISIF(2T104) and in part by the Nanosil funding from the European Community under FP7 Grant 216171. The review of this letter was arranged by Editor C.-P. Chang.
520 _ _ |a Ultrathin Ni silicides were formed on silicon-on-insulator (SOI) and biaxially tensile strained SOI (SSOI) substrates. The Ni layer thickness crucially determines the silicide phase formation: With a 3-nm Ni layer, high-quality epitaxial NiSi2 layers were grown at temperatures > 450 degrees C, while NiSi was formed with a 5-nm-thick Ni layer. A very thin Pt interlayer, to incorporate Pt into NiSi, improves the thermal stability and the interface roughness and lowers the contact resistivity. The contact resistivity of epitaxial NiSi2 is about one order of magnitude lower than that of a NiSi layer on both As-and B-doped SOI and SSOI.
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|a Ni silicide
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|a Zhao, Q. T.
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|a Urban, C.
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|a Ghyselen, B.
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|t IEEE Electron Device Letters
|v 31
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856 7 _ |u http://dx.doi.org/10.1109/LED.2010.2041028
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