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@ARTICLE{Nichau:133812,
author = {Nichau, Alexander and Schäfer, Anna and Knoll, Lars and
Wirths, Stephan and Schram, T. and Ragnarsson, L.-Å. and
Schubert, Jürgen and Bernardy, Patric and Luysberg, Martina
and Besmehn, Astrid and Breuer, Uwe and Buca, Dan Mihai and
Mantl, Siegfried},
title = {{R}eduction of silicon dioxide interfacial layer to 4.6 {A}
{EOT} by {A}l remote scavenging in high {K}/metal gate
stacks on {S}i},
journal = {Microelectronic engineering},
volume = {109},
address = {[S.l.] @},
publisher = {Elsevier},
reportid = {FZJ-2013-02206},
pages = {109 - 112},
year = {2013},
abstract = {The continued device scaling demands the reduction of the
equivalent oxide thickness (EOT) below 1 nm. For HfO2-based
gate stacks, the interfacial SiO2 limits the EOT scaling. A
low EOT can only be achieved if the interfacial layer (IL)
is reduced to its physical limit of ∼4 Å. Such thin EOT
are achievable if redox reactions within the gate stack are
employed in order to reduce SiO2. This study reports on the
use of an Al layer in combination with a TiN metal electrode
to reduce the IL and achieve lowest EOT values. The lowest
EOT achieved was 4.6 Å. However, the scavenging process was
found to strongly depend on the thermal budget after Al
deposition. The presented process adapts a standard
metal-inserted poly-Si flow (MIPS) prior to Al deposition,
but may also be an option to control IL regrowth.},
cin = {PGI-9 / PGI-5 / ZEA-3},
ddc = {620},
cid = {I:(DE-Juel1)PGI-9-20110106 / I:(DE-Juel1)PGI-5-20110106 /
I:(DE-Juel1)ZEA-3-20090406},
pnm = {421 - Frontiers of charge based Electronics (POF2-421) /
42G - Peter Grünberg-Centre (PG-C) (POF2-42G41)},
pid = {G:(DE-HGF)POF2-421 / G:(DE-HGF)POF2-42G41},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000321229200031},
doi = {10.1016/j.mee.2013.03.066},
url = {https://juser.fz-juelich.de/record/133812},
}