%0 Conference Paper
%A Zappon, F
%A Beuzekom, M van
%A Gromov, V
%A Kluit, R
%A Fang, X
%A Kruth, A
%T GOSSIPO-4: an array of high resolution TDCs with a PLL control
%J Journal of Instrumentation
%V 7
%N 01
%@ 1748-0221
%C London
%I Inst. of Physics
%M FZJ-2013-03215
%P C01081 - C01081
%D 2012
%X GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed to test a set of new features that will be used in TimePix3, including a 8 pixel structure sharing one fast oscillator with a new topology, a PLL to provide the control voltage to the oscillators, a custom fast counter and a new small-area cell library.
%B Topical Workshop on Electronics for Particle Physics
%C 26092011 - 30092011, Vienna (Austria)
Y2 26092011 - 30092011
M2 Vienna, Austria
%F PUB:(DE-HGF)8 ; PUB:(DE-HGF)16
%9 Contribution to a conference proceedingsJournal Article
%U <Go to ISI:>//WOS:000303806200081
%R 10.1088/1748-0221/7/01/C01081
%U https://juser.fz-juelich.de/record/135261