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001     135261
005     20250129092433.0
024 7 _ |a 10.1088/1748-0221/7/01/C01081
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041 _ _ |a English
082 _ _ |a 610
100 1 _ |a Zappon, F
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111 2 _ |a Topical Workshop on Electronics for Particle Physics
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245 _ _ |a GOSSIPO-4: an array of high resolution TDCs with a PLL control
260 _ _ |a London
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520 _ _ |a GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed to test a set of new features that will be used in TimePix3, including a 8 pixel structure sharing one fast oscillator with a new topology, a PLL to provide the control voltage to the oscillators, a custom fast counter and a new small-area cell library.
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700 1 _ |a Beuzekom, M van
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700 1 _ |a Gromov, V
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700 1 _ |a Kluit, R
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700 1 _ |a Fang, X
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700 1 _ |a Kruth, A
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773 _ _ |a 10.1088/1748-0221/7/01/C01081
|g Vol. 7, no. 01, p. C01081 - C01081
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|0 PERI:(DE-600)2235672-1
|t Journal of Instrumentation
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856 4 _ |u http://iopscience.iop.org/1748-0221/7/01/C01081/pdf/1748-0221_7_01_C01081.pdf
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910 1 _ |a Zentralinstitut für Elektronik
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