Hauptseite > Publikationsdatenbank > Scalasca support for MPI+OpenMP parallel applications on large-scale HPC systems based on Intel Xeon Phi > print

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037 _ _ |a FZJ-2013-03370
100 1 _ |a Wylie, Brian J. N.
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111 2 _ |a Conference on Extreme Science and Engineering Discovery Environment: Gateway to Discovery
|c San Diego, California
|d 2013-07-22 - 2013-07-25
|g XSEDE'13
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|p Proceedings of the Conference on Extreme Science and Engineering Discovery Environment Gateway to Discovery - XSEDE '13
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245 _ _ |a Scalasca support for MPI+OpenMP parallel applications on large-scale HPC systems based on Intel Xeon Phi
260 _ _ |a New York, New York, USA
|c 2013
|b ACM Press
295 1 0 |a XSEDE '13 Proceedings of the Conference on Extreme Science and Engineering Discovery Environment: Gateway to Discovery
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520 _ _ |a Intel Xeon Phi coprocessors based on the Many Integrated Core (MIC) architecture are starting to appear in HPC systems, with Stampede being a prominent example available within the XSEDE cyber-infrastructure. Porting MPI and OpenMP applications to such systems is often no more than simple recompilation, however, execution performance needs to be carefully analyzed and tuned to effectively exploit their unique capabilities. For performance measurement and analysis tools, the variety of execution modes need to be supported in a consistent and convenient manner, and especially execution configurations involving large numbers of compute nodes each with several multicore host processors and many-core coprocessors. Early experience using the open-source Scalasca toolset for runtime summarization and automatic trace analysis with the NPB BT-MZ MPI+OpenMP parallel application on Stampede is reported, along with discussion of on-going and future work.
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700 1 _ |a Frings, Wolfgang
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773 _ _ |a 10.1145/2484762.2484777
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