Home > Publications database > Realization of III-V semiconductor nano structures towards more efficient (opto-) electronic devices > print

001     150523
005     20210129213213.0
037 _ _ |a FZJ-2014-00577
041 _ _ |a English
100 1 _ |a Kamil, Sladek
|0 P:(DE-HGF)0
|b 0
|g male
245 _ _ |a Realization of III-V semiconductor nano structures towards more efficient (opto-) electronic devices
|f 2009-05-01 - 2013-04-30
260 _ _ |a Jülich
|c 2013
|b PGI-9: Halbleiter-Nanoelektronik
300 _ _ |a 100
336 7 _ |a Dissertation / PhD Thesis
|b phd
|m phd
|0 PUB:(DE-HGF)11
|s 1390298136_17899
|2 PUB:(DE-HGF)
336 7 _ |a Thesis
|0 2
|2 EndNote
336 7 _ |a doctoralThesis
|2 DRIVER
336 7 _ |a PHDTHESIS
|2 BibTeX
336 7 _ |a Output Types/Dissertation
|2 DataCite
336 7 _ |a DISSERTATION
|2 ORCID
500 _ _ |3 POF3_Assignment on 2016-02-29
502 _ _ |a RWTH Aachen, Diss., 2013
|c RWTH Aachen
|b Dr.
|d 2013
520 _ _ |a Solid state electronics and their application in personal computers, smartphones, digital cameras and entertainment devices (to name a few) have gained such a rapid progress that it’s already barely imaginable how our future technological environment will evolve in the next few years. In parallel, however, concerns about excessive use of the world’s limited natural energy resources has led to a rethinking with respect to the design and production of future electronics. One of the most promising solutions to further improve the efficiency of electronics is the combination of the well established silicon technology with III-V semiconductor nano structures which have been extensively investigated in various fields for the last few decades. InAs nano structures, in particular, are intrinsically conductive due to their characteristic conduction band profile, caused by surface states. The materials high bulk carrier mobility gives rise to expect a significant boost in efficiency of electronic devices that employ InAs nano structures. In this work, three different aspects of device improvement are addressed: the exchange of channel material in traditional CMOS, the development of new nanostructure based concepts and the use of direct band gap properties for more cost-effective sensing devices. The established SA MOVPE of III-V nano structures on III-V substrates serves as a starting point. Systematic experiments are conducted in order to address several significant questions regarding the suitability of III-V nano structures as building blocks for future electronic devices. It is found that a large variety of free-standing InAs nanowires with different properties can be produced in an ordered and controlled fashion. The results show that uniform InAs nanowires with a high aspect ratio can be produced selectively on GaAs(111)B and GaAs(110) oriented surfaces, the latter being also a natural cleaved edge direction of industrially used Si(001) substrates. In addition, very thin InAs nanowires with diameters down to 20 nm are obtained as a side effect on non-structured cleaved-edge sidewalls of GaAs(001). N-type doping with disilane is found to have a general impact on the nanowire morphology, resulting in a reduced height vs. diameter aspect ratio with an increased amount of doping applied during deposition. It is observed that all wires exhibit an intrinsic conductivity with an ohmic behavior which is further increased after doping. Also, the nanowire diameter is found to be a potential parameter to tune their electronic properties. A series of experiments with different growth parameters and the successive characterization of the nanowires‘ crystal structure reveal that different group-V partial pressures affect the formation of stacking faults and the crystal‘s wurtzite to zinc blende ratio. A significant step to combine the gained knowledge on controlled bottom-up InAs nanowire fabrication and benefits of SA MOVPE in N2 ambient with current silicon technology is the transition of InAs growth to silicon substrates. The technique of flow modulated epitaxy is adopted from MOVPE growth in hydrogen ambient and adapted and optimized for growth in N2 in order overcome the lack of polarity on silicon. As a result, InAs nanowire growth on Si(111) is carried out with a high yield of vertical wires. After the investigation of free standing InAs nanowires mainly for concepts exceeding CMOS, a methodology for the deposition of lateral InAs nano structures on silicon by SA MOVPE was presented, aimed towards the exchange of channel material in current planar electronic devices. Growth parameters adopted from GaAs/InAs core-shell nanowire growth are applied to a variety of differently oriented and patterned substrates. The obtained lateral structures are characterized with respect to morphology, crystal structure and electronic properties. High crystallinity and conductivity are found and discussed in comparison to the results obtained from vertical nanowires. Finally, quantum cascade structures based on ternary III-V semiconductors with high indium content are investigated with respect to single mode emission for gas sensing applications. It is found that curved laser waveguides are capable of single mode emission which is explained by the interaction of coupled cavities, resulting in strong side mode suppression. The monolithic approach without need for complicated sample processing has tremendous potential for the fabrication of cost effective and portable gas sensing devices.
536 _ _ |a 421 - Frontiers of charge based Electronics (POF2-421)
|0 G:(DE-HGF)POF2-421
|c POF2-421
|x 0
|f POF II
650 _ 7 |a Dissertation
|0 V:(DE-588b)4012494-0
|2 GND
|x Diss.
856 4 _ |u http://darwin.bth.rwth-aachen.de/opus3/volltexte/2013/4779/
909 C O |o oai:juser.fz-juelich.de:150523
|p VDB
910 1 _ |a Forschungszentrum Jülich GmbH
|0 I:(DE-588b)5008462-8
|k FZJ
|b 0
|6 P:(DE-HGF)0
913 2 _ |a DE-HGF
|b Key Technologies
|l Future Information Technology - Fundamentals, Novel Concepts and Energy Efficiency (FIT)
|1 G:(DE-HGF)POF3-520
|0 G:(DE-HGF)POF3-529H
|2 G:(DE-HGF)POF3-500
|v Addenda
|x 0
913 1 _ |a DE-HGF
|b Schlüsseltechnologien
|1 G:(DE-HGF)POF2-420
|0 G:(DE-HGF)POF2-421
|2 G:(DE-HGF)POF2-400
|v Frontiers of charge based Electronics
|x 0
|4 G:(DE-HGF)POF
|3 G:(DE-HGF)POF2
|l Grundlagen zukünftiger Informationstechnologien
914 1 _ |y 2013
920 _ _ |l no
920 1 _ |0 I:(DE-Juel1)PGI-9-20110106
|k PGI-9
|l Halbleiter-Nanoelektronik
|x 0
980 _ _ |a phd
980 _ _ |a VDB
980 _ _ |a UNRESTRICTED
980 _ _ |a I:(DE-Juel1)PGI-9-20110106

LibraryCollectionCLSMajorCLSMinorLanguageAuthor
Marc 21