| Home > Publications database > Design of an optical uplink with 10 GBit/s between PCIe and MicroTCA > print |
| 001 | 151175 | ||
| 005 | 20250129092427.0 | ||
| 024 | 7 | _ | |a 10.1109/RTC.2012.6418149 |2 doi |
| 037 | _ | _ | |a FZJ-2014-01174 |
| 100 | 1 | _ | |a Kleines, Harald |0 P:(DE-Juel1)133905 |b 0 |e Corresponding author |
| 111 | 2 | _ | |a 2012 IEEE-NPSS Real Time Conference (RT 2012) |c Berkeley |d 2012-06-09 - 2012-06-15 |w CA |
| 245 | _ | _ | |a Design of an optical uplink with 10 GBit/s between PCIe and MicroTCA |
| 260 | _ | _ | |c 2012 |b IEEE |
| 336 | 7 | _ | |a Proceedings |b proc |m proc |0 PUB:(DE-HGF)26 |s 1406893077_27351 |2 PUB:(DE-HGF) |
| 336 | 7 | _ | |a PROCEEDINGS |2 BibTeX |
| 336 | 7 | _ | |a BOOK |2 ORCID |
| 336 | 7 | _ | |a Output Types/Book |2 DataCite |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a Conference Proceedings |0 3 |2 EndNote |
| 520 | _ | _ | |a In the context of developments for the PANDA detector system an optical uplink from MicroTCA to PCIe is under development. The uplink is based on X2 transceivers with a nominal speed of 10 GBit/s. The PCIe board has already been produced and it is currently under test. It is based on a Xilinx Virtex 5 (XC5VLX30T) FPGA. For the implementation of the XAUI interface to the X2 transceiver a PM8358 SERDES with a parallel interface to the FPGA is used. The corresponding AMC module is based on the same components. Open issues regarding the FPGA implementation of the link protocol will be discussed. |
| 536 | _ | _ | |a 53G - COSY (POF2-53G32) |0 G:(DE-HGF)POF2-53G32 |c POF2-53G32 |f POF II |x 0 |
| 588 | _ | _ | |a Dataset connected to CrossRef Conference |
| 700 | 1 | _ | |a Wustner, Peter |0 P:(DE-Juel1)133959 |b 1 |
| 700 | 1 | _ | |a Drochner, Matthias |0 P:(DE-HGF)0 |b 2 |
| 700 | 1 | _ | |a Ackens, Axel |0 P:(DE-Juel1)133859 |b 3 |
| 700 | 1 | _ | |a Erven, Wilhelm |0 P:(DE-Juel1)133883 |b 4 |
| 700 | 1 | _ | |a Kammerling, Peter |0 P:(DE-Juel1)133909 |b 5 |
| 700 | 1 | _ | |a Ramm, Michael |0 P:(DE-HGF)0 |b 6 |
| 700 | 1 | _ | |a van Waasen, Stefan |0 P:(DE-Juel1)142562 |b 7 |
| 773 | _ | _ | |a 10.1109/RTC.2012.6418149 |y 2012 |
| 909 | C | O | |o oai:juser.fz-juelich.de:151175 |p VDB |
| 910 | 1 | _ | |a Zentralinstitut für Elektronik |0 I:(DE-Juel1)ZEA-2-20090406 |k ZEA-2 |b 0 |6 P:(DE-Juel1)133905 |
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| 913 | 2 | _ | |a DE-HGF |b Key Technologies |l Science and Technology of Nanosystems |1 G:(DE-HGF)POF3-530 |0 G:(DE-HGF)POF3-531 |2 G:(DE-HGF)POF3-500 |v Condensed Matter and Molecular Building Blocks |x 0 |
| 913 | 1 | _ | |a DE-HGF |b Struktur der Materie |l Physik der Hadronen und Kerne |1 G:(DE-HGF)POF2-530 |0 G:(DE-HGF)POF2-53G32 |2 G:(DE-HGF)POF2-500 |v COSY |x 0 |4 G:(DE-HGF)POF |3 G:(DE-HGF)POF2 |
| 914 | 1 | _ | |y 2014 |
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| 981 | _ | _ | |a I:(DE-Juel1)PGI-4-20110106 |
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