000151905 001__ 151905
000151905 005__ 20210120101910.0
000151905 020__ $$a978-3-89336-941-6
000151905 0247_ $$2Handle$$a2128/5958
000151905 0247_ $$2ISSN$$a1866-1777
000151905 037__ $$aFZJ-2014-01753
000151905 041__ $$aEnglish
000151905 1001_ $$0P:(DE-Juel1)156578$$aDürgün-Özben, Eylem$$b0$$eCorresponding author$$gfemale$$ufzj
000151905 245__ $$aCarrier mobility in advanced channel materials using alternative gate dielectrics$$f - 2013
000151905 260__ $$aJülich$$bForschungszentrum Jülich GmbH Zentralbibliothek, Verlag$$c2014
000151905 300__ $$a115 S.
000151905 3367_ $$2DataCite$$aOutput Types/Dissertation
000151905 3367_ $$0PUB:(DE-HGF)3$$2PUB:(DE-HGF)$$aBook$$mbook
000151905 3367_ $$2ORCID$$aDISSERTATION
000151905 3367_ $$2BibTeX$$aPHDTHESIS
000151905 3367_ $$02$$2EndNote$$aThesis
000151905 3367_ $$0PUB:(DE-HGF)11$$2PUB:(DE-HGF)$$aDissertation / PhD Thesis$$bphd$$mphd$$s1611127933_11499
000151905 3367_ $$2DRIVER$$adoctoralThesis
000151905 4900_ $$aSchriften des Forschungszentrums Jülich. Reihe Information / information$$v31
000151905 500__ $$3POF3_Assignment on 2016-02-29
000151905 502__ $$aDissertation, RWTH Aachen, 2013$$bDissertation$$cRWTH Aachen$$d2013
000151905 520__ $$aThe continuous downscaling in the dimension of MOSFETs yielded SiO$_{2}$ gate oxide to bereplaced by a high-$\kappa$ material Hf based gate oxide ($\kappa$~20) in the 45 nm technology node. In this way, the excessive leakage current, that was the main problem in scaled devices with SiO$_{2}$ gate oxide, was overcame and further scaling to 32 nm node was successfully achieved. However, for an even better performance in ultimately scaled devices (22 nmnode and beyond) higher-$\kappa$ dielectric materials are required. Due to their thermodynamic stability, higher-$\kappa$ values (23-32), high band gap and band offsets relative to silicon, rare earth based ternary oxides (e.g. GdScO$_{3}$, TbScO$_{3}$, LaScO$_{3}$, LaLuO$_{3}$....) are promising dielectrics for CMOS applications. On the other hand, it is essential to use silicon on insulator(SOI) and strained silicon on insulator (sSOI) as channel materials to improve the transistor properties and lower the power consumption. In this work, as a member of rare-earth based ternary oxides, LaLuO$_{3}$, LaScO$_{3}$, TbScO$_{3}$, and SmScO$_{3}$ thin films deposited on silicon were structurally and electrically investigated. The objective of the annealing study is to find an optimized condition for an improved device performance. The films are stoichiometric and amorphous up to 800-1000 ºC, however, silicate formation is an inevitable process during film growth. While silicate formation is triggered by oxygen annealing, applying forming gas (FG) annealing after TiN metal gate helps to reduce the interfacial layer (IL) thickness via scavenging of the oxygen from the interface. Optimization of the annealing process does not affect the $\kappa$ values and yields to smooth C-V curves with negligible hysteresis, low oxide and interface trap charges and low leakage current density, which of all are good sign in terms of mobility. A replacement gate process was developed for the integration of LaLuO$_{3}$, LaScO$_{3}$, TbScO$_{3}$, and SmScO$_{3}$ into MOSFETs using SOI and sSOI substrates. Long channel p-and n-type MOSFETs were successfully fabricated and promising results were achieved for devices with LaLuO$_{3}$, LaScO$_{3}$ and TbScO$_{3}$. For these devices an interface traps level in the rangeof 2-4x10$^{11}$ (eVcm$^{2})^{-1}$, steep subthreshold slope down to 65 mV/dec and high I$_{on}$/I$_{off}$ ratios up to 10$^{10}$ is achieved. The sSOI n-MOSFETs show strongly enhanced drain current and electron mobilities with a factor of 1.8 compared to SOI reference devices. These materials provide similar electron and hole mobilities to the reported HfO$_{2}$ and HfSiON materials, while could provide an advantage of higher scalability and lower leakage current density than HfO$_{2}$ due to their higher $\kappa$ values.
000151905 536__ $$0G:(DE-HGF)POF2-421$$a421 - Frontiers of charge based Electronics (POF2-421)$$cPOF2-421$$fPOF II$$x0
000151905 650_7 $$0V:(DE-588b)4012494-0$$2GND$$aDissertation$$xDiss.
000151905 8564_ $$uhttps://juser.fz-juelich.de/record/151905/files/FZJ-2014-01753.pdf$$yOpenAccess
000151905 8564_ $$uhttps://juser.fz-juelich.de/record/151905/files/FZJ-2014-01753.jpg?subformat=icon-144$$xicon-144$$yOpenAccess
000151905 8564_ $$uhttps://juser.fz-juelich.de/record/151905/files/FZJ-2014-01753.jpg?subformat=icon-180$$xicon-180$$yOpenAccess
000151905 8564_ $$uhttps://juser.fz-juelich.de/record/151905/files/FZJ-2014-01753.jpg?subformat=icon-640$$xicon-640$$yOpenAccess
000151905 909CO $$ooai:juser.fz-juelich.de:151905$$pdnbdelivery$$pdriver$$pVDB$$popen_access$$popenaire
000151905 9131_ $$0G:(DE-HGF)POF2-421$$1G:(DE-HGF)POF2-420$$2G:(DE-HGF)POF2-400$$3G:(DE-HGF)POF2$$4G:(DE-HGF)POF$$aDE-HGF$$bSchlüsseltechnologien$$lGrundlagen zukünftiger Informationstechnologien$$vFrontiers of charge based Electronics$$x0
000151905 9132_ $$0G:(DE-HGF)POF3-529H$$1G:(DE-HGF)POF3-520$$2G:(DE-HGF)POF3-500$$aDE-HGF$$bKey Technologies$$lFuture Information Technology - Fundamentals, Novel Concepts and Energy Efficiency (FIT)$$vAddenda$$x0
000151905 9141_ $$y2014
000151905 915__ $$0StatID:(DE-HGF)0510$$2StatID$$aOpenAccess
000151905 920__ $$lyes
000151905 9201_ $$0I:(DE-Juel1)PGI-9-20110106$$kPGI-9$$lHalbleiter-Nanoelektronik$$x0
000151905 980__ $$aphd
000151905 980__ $$aVDB
000151905 980__ $$abook
000151905 980__ $$aI:(DE-Juel1)PGI-9-20110106
000151905 980__ $$aUNRESTRICTED
000151905 9801_ $$aFullTexts