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@PHDTHESIS{Drgnzben:151905,
      author       = {Dürgün-Özben, Eylem},
      title        = {{C}arrier mobility in advanced channel materials using
                      alternative gate dielectrics},
      volume       = {31},
      school       = {RWTH Aachen},
      type         = {Dissertation},
      address      = {Jülich},
      publisher    = {Forschungszentrum Jülich GmbH Zentralbibliothek, Verlag},
      reportid     = {FZJ-2014-01753},
      isbn         = {978-3-89336-941-6},
      series       = {Schriften des Forschungszentrums Jülich. Reihe Information
                      / information},
      pages        = {115 S.},
      year         = {2014},
      note         = {Dissertation, RWTH Aachen, 2013},
      abstract     = {The continuous downscaling in the dimension of MOSFETs
                      yielded SiO$_{2}$ gate oxide to bereplaced by a
                      high-$\kappa$ material Hf based gate oxide ($\kappa$~20) in
                      the 45 nm technology node. In this way, the excessive
                      leakage current, that was the main problem in scaled devices
                      with SiO$_{2}$ gate oxide, was overcame and further scaling
                      to 32 nm node was successfully achieved. However, for an
                      even better performance in ultimately scaled devices (22
                      nmnode and beyond) higher-$\kappa$ dielectric materials are
                      required. Due to their thermodynamic stability,
                      higher-$\kappa$ values (23-32), high band gap and band
                      offsets relative to silicon, rare earth based ternary oxides
                      (e.g. GdScO$_{3}$, TbScO$_{3}$, LaScO$_{3}$,
                      LaLuO$_{3}$....) are promising dielectrics for CMOS
                      applications. On the other hand, it is essential to use
                      silicon on insulator(SOI) and strained silicon on insulator
                      (sSOI) as channel materials to improve the transistor
                      properties and lower the power consumption. In this work, as
                      a member of rare-earth based ternary oxides, LaLuO$_{3}$,
                      LaScO$_{3}$, TbScO$_{3}$, and SmScO$_{3}$ thin films
                      deposited on silicon were structurally and electrically
                      investigated. The objective of the annealing study is to
                      find an optimized condition for an improved device
                      performance. The films are stoichiometric and amorphous up
                      to 800-1000 ºC, however, silicate formation is an
                      inevitable process during film growth. While silicate
                      formation is triggered by oxygen annealing, applying forming
                      gas (FG) annealing after TiN metal gate helps to reduce the
                      interfacial layer (IL) thickness via scavenging of the
                      oxygen from the interface. Optimization of the annealing
                      process does not affect the $\kappa$ values and yields to
                      smooth C-V curves with negligible hysteresis, low oxide and
                      interface trap charges and low leakage current density,
                      which of all are good sign in terms of mobility. A
                      replacement gate process was developed for the integration
                      of LaLuO$_{3}$, LaScO$_{3}$, TbScO$_{3}$, and SmScO$_{3}$
                      into MOSFETs using SOI and sSOI substrates. Long channel
                      p-and n-type MOSFETs were successfully fabricated and
                      promising results were achieved for devices with
                      LaLuO$_{3}$, LaScO$_{3}$ and TbScO$_{3}$. For these devices
                      an interface traps level in the rangeof 2-4x10$^{11}$
                      (eVcm$^{2})^{-1}$, steep subthreshold slope down to 65
                      mV/dec and high I$_{on}$/I$_{off}$ ratios up to 10$^{10}$ is
                      achieved. The sSOI n-MOSFETs show strongly enhanced drain
                      current and electron mobilities with a factor of 1.8
                      compared to SOI reference devices. These materials provide
                      similar electron and hole mobilities to the reported
                      HfO$_{2}$ and HfSiON materials, while could provide an
                      advantage of higher scalability and lower leakage current
                      density than HfO$_{2}$ due to their higher $\kappa$ values.},
      keywords     = {Dissertation (GND)},
      cin          = {PGI-9},
      cid          = {I:(DE-Juel1)PGI-9-20110106},
      pnm          = {421 - Frontiers of charge based Electronics (POF2-421)},
      pid          = {G:(DE-HGF)POF2-421},
      typ          = {PUB:(DE-HGF)3 / PUB:(DE-HGF)11},
      url          = {https://juser.fz-juelich.de/record/151905},
}