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@ARTICLE{Ferch:186412,
      author       = {Ferch, S. and Linn, E. and Waser, R. and Menzel, S.},
      title        = {{S}imulation and comparison of two sequential
                      logic-in-memory approaches using a dynamic electrochemical
                      metallization cell model},
      journal      = {Microelectronics journal},
      volume       = {45},
      number       = {11},
      issn         = {0026-2692},
      address      = {Amsterdam [u.a.]},
      publisher    = {Elsevier Science},
      reportid     = {FZJ-2015-00488},
      pages        = {1416 - 1428},
      year         = {2014},
      abstract     = {Resistive switching devices are an emerging class of
                      non-volatile memory elements suited for application in
                      passive nano-crossbar arrays. These devices can be modeled
                      as dynamical systems, i.e. memristive devices or memristors
                      for short. The built-in non-linear switching kinetics of
                      these devices enables the performance of ‘stateful’
                      logic operations and widens the applicability of memory
                      arrays towards logic operations. In this work, two
                      logic-in-memories approaches are studied by means of
                      dynamical simulations. The first one is the initial
                      ‘stateful’ logic concept introduced by Boghetti et al.,
                      and the second approach is the complementary switch-based
                      concept later suggested by Linn et al. In both cases, the
                      considered device is an electrochemical metallization cell
                      for which good dynamical models are available. The study is
                      limited to the comparison of elementary logic
                      functions—multi-stage logic as well as parallelization
                      features of both approaches are not considered here. A
                      comparison of the elementary logic IMP and NAND operations
                      in terms of reliability, switching energy and basic array
                      compatibility is conducted, and crucial requirements for
                      both approaches are identified.},
      cin          = {PGI-7},
      ddc          = {620},
      cid          = {I:(DE-Juel1)PGI-7-20110106},
      pnm          = {421 - Frontiers of charge based Electronics (POF2-421)},
      pid          = {G:(DE-HGF)POF2-421},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000345641800008},
      doi          = {10.1016/j.mejo.2014.09.012},
      url          = {https://juser.fz-juelich.de/record/186412},
}