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@INPROCEEDINGS{Drochner:187618,
      author       = {Drochner, M. and Kleines, Harald and van Waasen, Stefan},
      title        = {{FPGA} {B}ased {C}ontrol and {D}ata {A}cquisition
                      {I}nterfaces for {PANDA} {C}omponents},
      reportid     = {FZJ-2015-01244},
      year         = {2014},
      abstract     = {For the upcoming PANDA detector at FAIR (Darmstadt,
                      Germany), various components for timing distribution,control
                      and data acquisition are being constructed. Design objective
                      is to support testing of detector components in alaboratory
                      environment, while keeping it scalable and use hardware
                      platforms and interfaces already agreed on for thefinal
                      implementation. For timing and certain control tasks, the
                      "SODANET" protocol is used which is developed withother
                      contributors in the PANDA project. The protocol runs on fast
                      serial links which are part of modern FPGAs; thelinks are
                      operated in a synchonous mode so that the timimg accuracy is
                      defined by the link clock. For data transfer, theCERN "GBT"
                      platform is used which is a unidirectional link with Forward
                      Error Correction. As hardware platform,MicroTCA.4 is used; a
                      suitable AMC module has been developed by DESY and KIT.},
      month         = {May},
      date          = {2014-05-25},
      organization  = {19th REAL TIME CONFERENCE, Nara
                       (Japan), 25 May 2014 - 30 May 2014},
      subtyp        = {Other},
      cin          = {ZEA-2},
      cid          = {I:(DE-Juel1)ZEA-2-20090406},
      pnm          = {53G - Participation in FAIR (POF2-53G31)},
      pid          = {G:(DE-HGF)POF2-53G31},
      typ          = {PUB:(DE-HGF)24},
      url          = {https://juser.fz-juelich.de/record/187618},
}