TY  - CONF
AU  - Esser, Rüdiger
AU  - Knecht, Renate
TI  - Intel Paragon XP/S - Architecture and Software Environment
CY  - Berlin, Heidelberg
PB  - Springer
M1  - FZJ-2015-02420
SN  - 978-3-540-56948-0 (print)
T2  - Informatik aktuell
SP  - 121 - 141
PY  - 1993
AB  - The paper describes the hardware and software components of the Intel Paragon XP/S system, a distributed memory scalable multicomputer. The Paragon processing nodes, which are based on the Intel i860 XP RISC processor, are connected by a two-dimensional mesh with high bandwidth. This new interconnection network and the new operating system are the main differences between the Paragon and its predecessor, the iPSC/860 with its hypercube topology. The paper first gives an overview of the Paragon system architecture, the node architecture, the interconnection network, I/O interfaces, and peripherals. The second part outlines the Paragon OSF/1 operating system and the program development environment including programming models, compilers, application libraries, and tools for parallelization, debugging, and performance analysis.
T2  - Supercomputer '93
CY  - 24 Jun 1993 - 26 Jun 1993, Mannheim (Germany)
Y2  - 24 Jun 1993 - 26 Jun 1993
M2  - Mannheim, Germany
LB  - PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
DO  - DOI:10.1007/978-3-642-78348-7_13
UR  - https://juser.fz-juelich.de/record/189229
ER  -