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@ARTICLE{Zhirnov:201024,
      author       = {Zhirnov, Victor V. and Cavin, Ralph K. and Menzel, Stephan
                      and Linn, Eike and Schmelzer, Sebastian and Brauhaus, Dennis
                      and Schindler, Christina and Waser, R.},
      title        = {{M}emory {D}evices: {E}nergy–{S}pace–{T}ime
                      {T}radeoffs},
      journal      = {Proceedings of the IEEE},
      volume       = {98},
      number       = {12},
      issn         = {1558-2256},
      address      = {New York, NY [u.a.]},
      reportid     = {FZJ-2015-03334},
      pages        = {2185 - 2200},
      year         = {2010},
      abstract     = {Many memory candidates based on beyond complementary
                      metal-oxide-semiconductor (CMOS) nanoelectronics have been
                      proposed, but no clear successor has yet been identified. In
                      this paper, we offer a methodology for system-level analysis
                      and address the relationship of the maximum performance of a
                      given memory device type to device physics. The method is
                      illustrated for the classical dynamic RAM (DRAM) device and
                      for the emerging memory device known as the resistive RAM
                      (ReRAM)},
      cin          = {PGI-7},
      ddc          = {620},
      cid          = {I:(DE-Juel1)PGI-7-20110106},
      pnm          = {424 - Exploratory materials and phenomena (POF2-424)},
      pid          = {G:(DE-HGF)POF2-424},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000284410800015},
      doi          = {10.1109/JPROC.2010.2064271},
      url          = {https://juser.fz-juelich.de/record/201024},
}