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| Hauptseite > Publikationsdatenbank > A Complementary Resistive Switch-Based Crossbar Array Adder > print |
| 001 | 201482 | ||
| 005 | 20210131030348.0 | ||
| 024 | 7 | _ | |a 10.1109/JETCAS.2015.2398217 |2 doi |
| 024 | 7 | _ | |a WOS:000351451000007 |2 WOS |
| 024 | 7 | _ | |a altmetric:21826337 |2 altmetric |
| 037 | _ | _ | |a FZJ-2015-03777 |
| 041 | _ | _ | |a English |
| 082 | _ | _ | |a 620 |
| 100 | 1 | _ | |a Siemon, Anne |0 P:(DE-HGF)0 |b 0 |
| 245 | _ | _ | |a A Complementary Resistive Switch-Based Crossbar Array Adder |
| 260 | _ | _ | |a New York, NY |c 2015 |b IEEE |
| 336 | 7 | _ | |a Journal Article |b journal |m journal |0 PUB:(DE-HGF)16 |s 1435223466_21682 |2 PUB:(DE-HGF) |
| 336 | 7 | _ | |a Output Types/Journal article |2 DataCite |
| 336 | 7 | _ | |a Journal Article |0 0 |2 EndNote |
| 336 | 7 | _ | |a ARTICLE |2 BibTeX |
| 336 | 7 | _ | |a JOURNAL_ARTICLE |2 ORCID |
| 336 | 7 | _ | |a article |2 DRIVER |
| 520 | _ | _ | |a Redox-based resistive switching devices (ReRAM) are an emerging class of nonvolatile storage elements suited for nanoscale memory applications. In terms of logic operations, ReRAM devices were suggested to be used as programmable interconnects, large-scale look-up tables or for sequential logic operations. However, without additional selector devices these approaches are not suited for use in large scale nanocrossbar memory arrays, which is the preferred architecture for ReRAM devices due to the minimum area consumption. To overcome this issue for the sequential logic approach, we recently introduced a novel concept, which is suited for passive crossbar arrays using complementary resistive switches (CRSs). CRS cells offer two high resistive storage states, and thus, parasitic “sneak” currents are efficiently avoided. However, until now the CRS-based logic-in-memory approach was only shown to be able to perform basic Boolean logic operations using a single CRS cell. In this paper, we introduce two multi-bit adder schemes using the CRS-based logic-in-memory approach. We proof the concepts by means of SPICE simulations using a dynamical memristive device model of a ReRAM cell. Finally, we show the advantages of our novel adder concept in terms of step count and number of devices in comparison to a recently published adder approach, which applies the conventional ReRAM-based sequential logic concept introduced by Borghetti et al. |
| 536 | _ | _ | |a 521 - Controlling Electron Charge-Based Phenomena (POF3-521) |0 G:(DE-HGF)POF3-521 |c POF3-521 |x 0 |f POF III |
| 588 | _ | _ | |a Dataset connected to CrossRef, juser.fz-juelich.de |
| 700 | 1 | _ | |a Menzel, Stephan |0 P:(DE-Juel1)158062 |b 1 |
| 700 | 1 | _ | |a Waser, R. |0 P:(DE-Juel1)131022 |b 2 |u fzj |
| 700 | 1 | _ | |a Linn, Eike |0 P:(DE-HGF)0 |b 3 |
| 773 | _ | _ | |a 10.1109/JETCAS.2015.2398217 |0 PERI:(DE-600)2585706-X |p 64 - 74 |t IEEE journal on emerging and selected topics in circuits and systems |v 5 |y 2015 |x 2156-3357 |
| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/201482/files/07038233.pdf |y Restricted |
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| 910 | 1 | _ | |a Forschungszentrum Jülich GmbH |0 I:(DE-588b)5008462-8 |k FZJ |b 1 |6 P:(DE-Juel1)158062 |
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| 913 | 0 | _ | |a DE-HGF |b Schlüsseltechnologien |l Grundlagen für zukünftige Informationstechnologien |1 G:(DE-HGF)POF2-420 |0 G:(DE-HGF)POF2-421 |2 G:(DE-HGF)POF2-400 |v Frontiers of charge based Electronics |x 0 |
| 913 | 1 | _ | |a DE-HGF |b Key Technologies |l Future Information Technology - Fundamentals, Novel Concepts and Energy Efficiency (FIT) |1 G:(DE-HGF)POF3-520 |0 G:(DE-HGF)POF3-521 |2 G:(DE-HGF)POF3-500 |v Controlling Electron Charge-Based Phenomena |x 0 |4 G:(DE-HGF)POF |3 G:(DE-HGF)POF3 |
| 914 | 1 | _ | |y 2015 |
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