TY  - JOUR
AU  - Yu, W.
AU  - Zhang, B.
AU  - Liu, C.
AU  - Zhao, Y.
AU  - Wu, W. R.
AU  - Xue, Z. Y.
AU  - Chen, M.
AU  - Buca, D.
AU  - Hartmann, J.-M.
AU  - Wang, X.
AU  - Zhao, Q. T.
AU  - Mantl, S.
TI  - Impact of Si cap, strain and temperature on the hole mobility of (s)Si/sSiGe/(s)SOI quantum-well p-MOSFETs
JO  - Microelectronic engineering
VL  - 113
SN  - 0167-9317
CY  - [S.l.] @
PB  - Elsevier
M1  - FZJ-2015-05156
SP  - 5 - 9
PY  - 2014
AB  - Quantum-well p-MOSFETs are fabricated on (strained) Si/strained SiGe/(strained) SOI hetero-structure substrates and the effects of Si cap, strain and temperature on hole mobility are investigated. The Si cap layer which behaves as a passivation layer for the SiGe improves the hole mobility by suppressing the scattering due to charges in the high-κ layer and at the high-κ interface. High strain in SiGe enhances the Ge interdiffusion during the thermal process, leading to reduced hole mobilities. The transistors are also characterized at very low temperatures and the scattering mechanism is discussed.
LB  - PUB:(DE-HGF)16
UR  - <Go to ISI:>//WOS:000327293500002
DO  - DOI:10.1016/j.mee.2013.06.015
UR  - https://juser.fz-juelich.de/record/203147
ER  -