% IMPORTANT: The following is UTF-8 encoded. This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.
@ARTICLE{Nichau:21117,
author = {Nichau, A. and Durgun Özben, E. and Schnee, M. and Lopes,
J.M.J. and Besmehn, A. and Luysberg, M. and Knoll, L. and
Habicht, S. and Mussmann, V. and Luptak, R. and Lenk, St.
and Rubio-Zuazo, J. and Castro, G.R. and Buca, D. and Zhao,
Q.T. and Schubert, J. and Mantl, S.},
title = {{L}a{L}u{O}3 higher-k dielectric integration in {SOI}
{MOSFET}s with a gate-first process},
journal = {Solid state electronics},
volume = {71},
issn = {0038-1101},
address = {Oxford [u.a.]},
publisher = {Pergamon, Elsevier Science},
reportid = {PreJuSER-21117},
pages = {19 - 24},
year = {2012},
note = {Record converted from VDB: 12.11.2012},
abstract = {The chemical reactions at the higher-kappa
LaLuO3/Ti1Nx/poly-Si gate stack interface.; are in detail
investigated. Electrical and structural characterization
methods are employed to explore the thermal stability of the
gate stack. A Ti-rich TiN metal layer degrades the gate
stack performance after high temperature annealing while the
gate stack with a near stoichiometric TiN layer is stable
during 1000 degrees C, 5s anneals. Based on these results an
integration process of TiN/LaLuO3 in a gate-first MOSFET
process on SOI is shown. (C) 2011 Elsevier Ltd. All rights
reserved.},
keywords = {J (WoSType)},
cin = {JARA-FIT / PGI-9 / ZCH / PGI-5},
ddc = {530},
cid = {$I:(DE-82)080009_20140620$ / I:(DE-Juel1)PGI-9-20110106 /
I:(DE-Juel1)ZCH-20090406 / I:(DE-Juel1)PGI-5-20110106},
pnm = {Grundlagen für zukünftige Informationstechnologien},
pid = {G:(DE-Juel1)FUEK412},
shelfmark = {Engineering, Electrical $\&$ Electronic / Physics, Applied
/ Physics, Condensed Matter},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000303033800005},
doi = {10.1016/j.sse.2011.10.014},
url = {https://juser.fz-juelich.de/record/21117},
}