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| Home > Publications database > Experimental demonstration of inverter and NAND operation in p-TFET logic at ultra-low supply voltages down to VDD = 0.15 V > print |
| 001 | 280071 | ||
| 005 | 20210129221209.0 | ||
| 024 | 7 | _ | |a 10.1109/DRC.2014.6872281 |2 doi |
| 037 | _ | _ | |a FZJ-2015-07818 |
| 100 | 1 | _ | |a Richter, Simon |0 P:(DE-Juel1)5960 |b 0 |e Corresponding author |
| 111 | 2 | _ | |a 2014 72nd Annual Device Research Conference (DRC) |g DRC 2014 |c Santa Barbara |d 2014-06-22 - 2014-06-25 |w CA |
| 245 | _ | _ | |a Experimental demonstration of inverter and NAND operation in p-TFET logic at ultra-low supply voltages down to VDD = 0.15 V |
| 260 | _ | _ | |c 2014 |b IEEE |
| 300 | _ | _ | |a 23-24 |
| 336 | 7 | _ | |a Contribution to a conference proceedings |b contrib |m contrib |0 PUB:(DE-HGF)8 |s 1452684430_2870 |2 PUB:(DE-HGF) |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
| 336 | 7 | _ | |a CONFERENCE_PAPER |2 ORCID |
| 336 | 7 | _ | |a Output Types/Conference Paper |2 DataCite |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
| 520 | _ | _ | |a Tunnel-FETs (TFETs) have been studied extensively as a replacement for MOSFETs in the supply voltage regime below VDD = 0.3 V [1]. Due to the TFET ability for offering inverse subthreshold slopes SS below 60 mV/dec, these devices are promising candidates for power efficient integrated circuits. Extensive research has been carried out on the characteristics of single TFET devices [2][3] and first inverter structures have been realized as demonstration of simple logic circuits [4][5][6]. In this work, we present TFET logic circuits based on gate-all-around (GAA) Si nanowire (NW) array TFETs showing small SS and high Ion of 39 μA/μm at VDD = -1 V. This comparably high performance in Si TFETs was realized by a source formation via silicidation and dopant segregation. Using these devices inverters based on p-TFET logic and for the first time TFET NAND gates are demonstrated experimentally. The logic gates operate at ultra-low supply voltages down to VDD = 0.15 V. |
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| 700 | 1 | _ | |a Schulte-Braucks, Christian |0 P:(DE-Juel1)161530 |b 1 |
| 700 | 1 | _ | |a Knoll, Lars |0 P:(DE-HGF)0 |b 2 |
| 700 | 1 | _ | |a Luong, Gia Vinh |0 P:(DE-Juel1)156277 |b 3 |
| 700 | 1 | _ | |a Schäfer, Anna |0 P:(DE-HGF)0 |b 4 |
| 700 | 1 | _ | |a Trellenkamp, Stefan |0 P:(DE-Juel1)128856 |b 5 |
| 700 | 1 | _ | |a Zhao, Qing-Tai |0 P:(DE-Juel1)128649 |b 6 |
| 700 | 1 | _ | |a Mantl, Siegfried |0 P:(DE-Juel1)128609 |b 7 |
| 773 | _ | _ | |a 10.1109/DRC.2014.6872281 |
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