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017 _ _ |a This version is available at the following Publisher URL: http://apl.aip.org
024 7 _ |a 10.1063/1.2150581
|2 DOI
024 7 _ |a WOS:000234338700097
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024 7 _ |a 2128/2041
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037 _ _ |a PreJuSER-53197
041 _ _ |a eng
082 _ _ |a 530
084 _ _ |2 WoS
|a Physics, Applied
100 1 _ |a Knoch, J.
|b 0
|u FZJ
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245 _ _ |a Effective Schottky barrier lowering in silicon-on-insulator Schottky-barrier metal-oxide-semiconductor field-effect transistors using dopant segregation
260 _ _ |a Melville, NY
|b American Institute of Physics
|c 2005
300 _ _ |a 263505
336 7 _ |a Journal Article
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336 7 _ |a article
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440 _ 0 |a Applied Physics Letters
|x 0003-6951
|0 562
|v 87
500 _ _ |a Record converted from VDB: 12.11.2012
520 _ _ |a We present an investigation of the use of dopant segregation in Schottky-barrier metal-oxide-semiconductor field-effect transistors on silicon-on-insulator. Experimental results on devices with fully nickel silicided source and drain contacts show that arsenic segregation during silicidation leads to strongly improved device characteristics due to a strong conduction/valence band bending at the contact interface induced by a very thin, highly doped silicon layer formed during the silicidation. With simulations, we study the effect of varying silicon-on-insulator and gate oxide thicknesses on the performance of Schottky-barrier devices with dopant segregation. It is shown that due to the improved electrostatic gate control, a combination of both ultrathin silicon bodies and gate oxides with dopant segregation yields even further improved device characteristics greatly relaxing the need for low Schottky barrier materials in order to realize high-performance Schottky-barrier transistors.
536 _ _ |a Materialien, Prozesse und Bauelemente für die Mikro- und Nanoelektronik
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700 1 _ |a Zang, M.
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700 1 _ |a Zhao, Q. T.
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700 1 _ |a Lenk, S.
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700 1 _ |a Mantl, S.
|b 4
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700 1 _ |a Appenzeller, J.
|b 5
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773 _ _ |a 10.1063/1.2150581
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|x 0003-6951
856 7 _ |u http://dx.doi.org/10.1063/1.2150581
|u http://hdl.handle.net/2128/2041
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