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@ARTICLE{Rosezin:6083,
      author       = {Rosezin, R. and Nauenheim, C. and Trellenkamp, S. and
                      Kügeler, C. and Waser, R.},
      title        = {{E}lectrical properties of {P}t interconnects for passive
                      crossbar memory arrays},
      journal      = {Microelectronic engineering},
      volume       = {86},
      issn         = {0167-9317},
      address      = {[S.l.] @},
      publisher    = {Elsevier},
      reportid     = {PreJuSER-6083},
      pages        = {2275 - 2278},
      year         = {2009},
      note         = {Record converted from VDB: 12.11.2012},
      abstract     = {We report on the fabrication and the electrical
                      characterization of platinum interconnects for novel
                      nonvolatile memory technologies. These nanowires present an
                      important and essential contribution to the deep nanometer
                      scaling of alternative architectures beyond CMOS, e.g.
                      nanocrossbar arrays with resistance switching junctions. The
                      nanowires, which have a thickness of 25 nm and a width
                      ranging from 200 nm down to 40 nm, were patterned using
                      electron beam direct writing. They were deposited by UHV
                      electron beam evaporation in combination with a lift-off
                      process.The electrical characteristic is increasingly
                      affected by the contribution of surface effects like
                      scattering at grain boundaries and scattering at the
                      surfaces as the wire dimensions become smaller. With
                      decreasing width of the platinum wire an increasing
                      resistivity was observed, which is consistent with the
                      theories of Fuchs-Sondheimer and Mayadas-Shatzkes. Our
                      studies have shown that the investigated structures possess
                      a high stability concerning the operational current
                      densities up to 4 x 10(7) A/cm(2), and an additional
                      annealing step results in an improvement of the electrical
                      wire properties, which is explained by a higher quality of
                      the grain boundaries and side walls. (C) 2009 Elsevier B.V.
                      All rights reserved.},
      keywords     = {J (WoSType)},
      cin          = {IFF-6 / JARA-FIT / IBN-PT},
      ddc          = {620},
      cid          = {I:(DE-Juel1)VDB786 / $I:(DE-82)080009_20140620$ /
                      I:(DE-Juel1)VDB554},
      pnm          = {Grundlagen für zukünftige Informationstechnologien},
      pid          = {G:(DE-Juel1)FUEK412},
      shelfmark    = {Engineering, Electrical $\&$ Electronic / Nanoscience $\&$
                      Nanotechnology / Optics / Physics, Applied},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000271363900025},
      doi          = {10.1016/j.mee.2009.04.004},
      url          = {https://juser.fz-juelich.de/record/6083},
}