%0 Journal Article
%A Luong, Gia Vinh
%A Narimani, K.
%A Tiedemann, Andreas
%A Bernardy, P.
%A Trellenkamp, S.
%A Zhao, Q. T.
%A Mantl, S.
%T Complementary Strained Si GAA Nanowire TFET Inverter With Suppressed Ambipolarity
%J IEEE electron device letters
%V 37
%N 8
%@ 1558-0563
%C New York, NY
%I IEEE
%M FZJ-2016-06405
%P 950 - 953
%D 2016
%X In this letter, we present complementary tunneling field-effect transistors (CTFETs) based on strained Si with gate all around nanowire structures on a single chip. The main focus is to suppress the ambipolar behavior of the TFETs with a gate-drain underlap. Detailed device characterization and demonstration of a CTFET inverter show that the ambipolar current is successfully eliminated for both pand n-devices. The CTFET inverter transfer characteristics indicate maximum separation of the high/low level with a sharp transition (high voltage gain) at a Vdd down to 0.4 V. In addition, high noise margin levels of 40% of the applied Vdd are obtained.
%F PUB:(DE-HGF)16
%9 Journal Article
%U <Go to ISI:>//WOS:000380330000001
%R 10.1109/LED.2016.2582041
%U https://juser.fz-juelich.de/record/821167