Parallel I/O Architecture Modelling Based on File System Counters

El Sayed Mohamed, Salem; Pleiter, Dirk; Bolten, Matthias

doi:10.1007/978-3-319-46079-6_43

Contribution to a conference proceedings/Contribution to a book

FZJ-2016-06455

Parallel I/O Architecture Modelling Based on File System Counters

El Sayed Mohamed, S. (Corresponding author)FZJ* ; Bolten, M. ; Pleiter, D.FZJ*

2016
Springer International Publishing Cham
ISBN: 978-3-319-46078-9 (print), 978-3-319-46079-6 (electronic)

High Performance Computing / Taufer, Michela (Editor) ; Cham : Springer International Publishing, 2016, Chapter 43 ; ISSN: 0302-9743=1611-3349 ; ISBN: 978-3-319-46078-9=978-3-319-46079-6
Workshop On Performance and Scalability of Storage Systems, WOPSSS 2016, Frankfurt, Germany, 23 Jun 2016 - 23 Jun 2016 Cham : Springer International Publishing, Lecture Notes in Computer Science 9945, 627 - 637 (2016) [10.1007/978-3-319-46079-6_43]

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Please use a persistent id in citations: doi:10.1007/978-3-319-46079-6_43

Abstract: Keeping compute and I/O performance balanced is a major challenge for future cost-efficient HPC systems. Several architectural concepts and new technologies allow to address this challenge, however at the price of higher complexity. In this paper we propose a particular approach to exploring the design space using event simulation models that take I/O server-side performance counters as input. In this way real-life data can be used to explore architectural modifications. We apply our approach using data collected by a GPFS file system serving a petascale Blue Gene/P installation.

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